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authorHeiko Stuebner <heiko@sntech.de>2019-08-05 16:40:35 +0200
committerHeiko Stuebner <heiko@sntech.de>2019-08-09 09:40:19 +0200
commitdd4a0d1618a6367061ab507ea450db98bbf2cc36 (patch)
tree01df0704ddf61621c72fdfb705eb795183b5824b /plat/rockchip/common/params_setup.c
parent30970e0f2979e297831f8ea27466aa3e67992ce4 (diff)
downloadtrusted-firmware-a-dd4a0d1618a6367061ab507ea450db98bbf2cc36.tar.gz
rockchip: move dt-coreboot uart distinction into param handling code
Rockchip platforms can be booted from either u-boot or coreboot. So far the Coreboot-console was initizalized from a coreboot data struct in the early_param2 callbacks and dt-based consoles with data from the rockchip_get_uart_* functions. But later code may also need this console information for example for special suspend handling. To make this easy follow a suggestion from Julius Werner and move the coreboot<->dt distinction into the rockchip_get_uart_* functions, thus making correct data about the used uart available to all Rockchip platform code at all times. This includes a new rockchip_get_uart_clock as well, because while the dt-platforms right now always just default the rate defined in a constant Coreboot provides its own field for the clock rate and we don't want to loose that information for the console init. Similarly the rk_uart_* variables should move into the non-Coreboot code, to prevent them from being marked as unused, which also requires the rk_get_uart_* functions to move below the actual dt-parsing. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Change-Id: I278d595d2aa6c6864187fc8979a9fbff9814feac
Diffstat (limited to 'plat/rockchip/common/params_setup.c')
-rw-r--r--plat/rockchip/common/params_setup.c42
1 files changed, 30 insertions, 12 deletions
diff --git a/plat/rockchip/common/params_setup.c b/plat/rockchip/common/params_setup.c
index 9e8ef40cec..8c2e5e911b 100644
--- a/plat/rockchip/common/params_setup.c
+++ b/plat/rockchip/common/params_setup.c
@@ -26,18 +26,6 @@ static struct bl_aux_gpio_info poweroff_gpio;
static struct bl_aux_gpio_info suspend_gpio[10];
uint32_t suspend_gpio_cnt;
static struct bl_aux_rk_apio_info suspend_apio;
-static uint32_t rk_uart_base = PLAT_RK_UART_BASE;
-static uint32_t rk_uart_baudrate = PLAT_RK_UART_BAUDRATE;
-
-uint32_t rockchip_get_uart_base(void)
-{
- return rk_uart_base;
-}
-
-uint32_t rockchip_get_uart_baudrate(void)
-{
- return rk_uart_baudrate;
-}
#if COREBOOT
static int dt_process_fdt(u_register_t param_from_bl2)
@@ -45,6 +33,9 @@ static int dt_process_fdt(u_register_t param_from_bl2)
return -ENODEV;
}
#else
+static uint32_t rk_uart_base = PLAT_RK_UART_BASE;
+static uint32_t rk_uart_baudrate = PLAT_RK_UART_BAUDRATE;
+static uint32_t rk_uart_clock = PLAT_RK_UART_CLOCK;
static uint8_t fdt_buffer[0x10000];
void *plat_get_fdt(void)
@@ -154,6 +145,33 @@ static int dt_process_fdt(u_register_t param_from_bl2)
}
#endif
+uint32_t rockchip_get_uart_base(void)
+{
+#if COREBOOT
+ return coreboot_serial.baseaddr;
+#else
+ return rk_uart_base;
+#endif
+}
+
+uint32_t rockchip_get_uart_baudrate(void)
+{
+#if COREBOOT
+ return coreboot_serial.baud;
+#else
+ return rk_uart_baudrate;
+#endif
+}
+
+uint32_t rockchip_get_uart_clock(void)
+{
+#if COREBOOT
+ return coreboot_serial.input_hertz;
+#else
+ return rk_uart_clock;
+#endif
+}
+
struct bl_aux_gpio_info *plat_get_rockchip_gpio_reset(void)
{
return &rst_gpio;