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authorCaesar Wang <wxt@rock-chips.com>2016-09-10 02:43:15 +0800
committerCaesar Wang <wxt@rock-chips.com>2016-09-10 04:06:44 +0800
commite550c6310118d1369796751ce98fe66167db0861 (patch)
tree0cf3822182b414263ee0304e40fe69629eddd29e /plat/rockchip/common/include
parent536c2492456758d2fe7e28b11ece9001c4d79cc0 (diff)
downloadtrusted-firmware-a-e550c6310118d1369796751ce98fe66167db0861.tar.gz
rockchip: support disable/enable specific gpio when suspend/resume
some specific board need to disable/enable specific gpio when suspend/resume, so we add this function, bootloader can pass the specific gpio, and we can handle these gpios in bl31 suspend/resuem function. Change-Id: I373b03ef9202ee4a05a2b9caacdfa01b47ee2177
Diffstat (limited to 'plat/rockchip/common/include')
-rw-r--r--plat/rockchip/common/include/plat_params.h11
-rw-r--r--plat/rockchip/common/include/plat_private.h5
2 files changed, 14 insertions, 2 deletions
diff --git a/plat/rockchip/common/include/plat_params.h b/plat/rockchip/common/include/plat_params.h
index cad453535d..7e1f275f74 100644
--- a/plat/rockchip/common/include/plat_params.h
+++ b/plat/rockchip/common/include/plat_params.h
@@ -63,11 +63,22 @@
* alignment fault will occur during accessing its data member.
*/
+#define BL31_GPIO_DIR_OUT 0
+#define BL31_GPIO_DIR_IN 1
+
+#define BL31_GPIO_LEVEL_LOW 0
+#define BL31_GPIO_LEVEL_HIGH 1
+
+#define BL31_GPIO_PULL_NONE 0
+#define BL31_GPIO_PULL_UP 1
+#define BL31_GPIO_PULL_DOWN 2
+
/* param type */
enum {
PARAM_NONE = 0,
PARAM_RESET,
PARAM_POWEROFF,
+ PARAM_SUSPEND_GPIO,
};
struct gpio_info {
diff --git a/plat/rockchip/common/include/plat_private.h b/plat/rockchip/common/include/plat_private.h
index b9b634e7bc..4f87a76020 100644
--- a/plat/rockchip/common/include/plat_private.h
+++ b/plat/rockchip/common/include/plat_private.h
@@ -121,8 +121,9 @@ uintptr_t plat_get_sec_entrypoint(void);
void platform_cpu_warmboot(void);
-void *plat_get_rockchip_gpio_reset(void);
-void *plat_get_rockchip_gpio_poweroff(void);
+struct gpio_info *plat_get_rockchip_gpio_reset(void);
+struct gpio_info *plat_get_rockchip_gpio_poweroff(void);
+struct gpio_info *plat_get_rockchip_suspend_gpio(uint32_t *count);
void plat_rockchip_gpio_init(void);
extern const unsigned char rockchip_power_domain_tree_desc[];