diff options
author | Lin Huang <hl@rock-chips.com> | 2017-05-04 16:02:45 +0800 |
---|---|---|
committer | Caesar Wang <wxt@rock-chips.com> | 2017-06-08 09:59:49 +0800 |
commit | bc5c30073e1ec28407e22727848df1adda433636 (patch) | |
tree | 70ecde7908a2fa53a36573e7219a2cc4338add97 /plat/rockchip/common/include | |
parent | a9059b9643932782c17a9a5366f7019817819d44 (diff) | |
download | trusted-firmware-a-bc5c30073e1ec28407e22727848df1adda433636.tar.gz |
rockchip: add pmusram section
the function pmu_cpuon_entrypoint() need to run in the pmusram,
we just copy bin file to pmusram before, now we add pmusram section
and link pmu_cpuon_entrypoint() to pmusram directly
Change-Id: Iae31e4c01c480c8e6f565a8f588332b478efdb16
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Diffstat (limited to 'plat/rockchip/common/include')
-rw-r--r-- | plat/rockchip/common/include/plat_private.h | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/plat/rockchip/common/include/plat_private.h b/plat/rockchip/common/include/plat_private.h index 867d9add94..f0aee08777 100644 --- a/plat/rockchip/common/include/plat_private.h +++ b/plat/rockchip/common/include/plat_private.h @@ -15,11 +15,15 @@ #define __sramdata __attribute__((section(".sram.data"))) #define __sramconst __attribute__((section(".sram.rodata"))) -#define __sramfunc __attribute__((section(".sram.text"))) \ - __attribute__((noinline)) +#define __sramfunc __attribute__((section(".sram.text"))) + +#define __pmusramdata __attribute__((section(".pmusram.data"))) +#define __pmusramconst __attribute__((section(".pmusram.rodata"))) +#define __pmusramfunc __attribute__((section(".pmusram.text"))) extern uint32_t __bl31_sram_text_start, __bl31_sram_text_end; extern uint32_t __bl31_sram_data_start, __bl31_sram_data_end; +extern uint32_t __bl31_sram_stack_start, __bl31_sram_stack_end; extern uint32_t __sram_incbin_start, __sram_incbin_end; @@ -73,7 +77,6 @@ void plat_rockchip_gic_cpuif_enable(void); void plat_rockchip_gic_cpuif_disable(void); void plat_rockchip_gic_pcpu_init(void); -void plat_rockchip_pmusram_prepare(void); void plat_rockchip_pmu_init(void); void plat_rockchip_soc_init(void); uintptr_t plat_get_sec_entrypoint(void); @@ -110,15 +113,13 @@ void __dead2 rockchip_soc_sys_pd_pwr_dn_wfi(void); extern const unsigned char rockchip_power_domain_tree_desc[]; -extern void *pmu_cpuson_entrypoint_start; -extern void *pmu_cpuson_entrypoint_end; +extern void *pmu_cpuson_entrypoint; extern uint64_t cpuson_entry_point[PLATFORM_CORE_COUNT]; extern uint32_t cpuson_flags[PLATFORM_CORE_COUNT]; extern const mmap_region_t plat_rk_mmap[]; -void rockchip_plat_sram_mmu_el3(void); -void plat_rockchip_mem_prepare(void); +void rockchip_plat_mmu_el3(void); #endif /* __ASSEMBLY__ */ |