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authorXing Zheng <zhengxing@rock-chips.com>2016-10-26 21:25:26 +0800
committerXing Zheng <zhengxing@rock-chips.com>2017-02-24 20:07:44 +0800
commit977001aa877f90dfbc8033f8b266b7488c442038 (patch)
tree584e869a298894c9ef42fa99acecd315bd56b224 /plat/rockchip/common/include
parente82f5082726cbbf6015fb9f0419f094f17869515 (diff)
downloadtrusted-firmware-a-977001aa877f90dfbc8033f8b266b7488c442038.tar.gz
rk3399: dram: use PMU M0 to do ddr frequency scaling
We used dcf do ddr frequency scaling, but we just include a dcf binary, it hard to maintain later, we have M0 compile flow in ATF, and M0 can also work for ddr frequency scaling, so let's use it. Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Diffstat (limited to 'plat/rockchip/common/include')
-rw-r--r--plat/rockchip/common/include/plat_private.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/plat/rockchip/common/include/plat_private.h b/plat/rockchip/common/include/plat_private.h
index b2234a6502..9638aae3fe 100644
--- a/plat/rockchip/common/include/plat_private.h
+++ b/plat/rockchip/common/include/plat_private.h
@@ -44,6 +44,7 @@
extern uint32_t __bl31_sram_text_start, __bl31_sram_text_end;
extern uint32_t __bl31_sram_data_start, __bl31_sram_data_end;
+extern uint32_t __sram_incbin_start, __sram_incbin_end;
/******************************************************************************
* For rockchip socs pm ops