diff options
author | Varun Wadekar <vwadekar@nvidia.com> | 2017-03-06 09:15:15 -0800 |
---|---|---|
committer | Varun Wadekar <vwadekar@nvidia.com> | 2017-03-07 10:27:21 -0800 |
commit | 1f38d3c955730513a0ed625adb3b83b668cb1764 (patch) | |
tree | 58c9b45a5a482bc94f73787a5c1f70f099775289 /plat/nvidia/tegra/soc/t210/platform_t210.mk | |
parent | 32bf0e2985e008ba7744b71c1f11397feae9af28 (diff) | |
download | trusted-firmware-a-1f38d3c955730513a0ed625adb3b83b668cb1764.tar.gz |
Tegra210: enable errata for Cortex-A57 and Cortex-A53 CPUs
This patch enables the following erratas for the Tegra210 SoC:
* Cortex-A57
=============
- A57_DISABLE_NON_TEMPORAL_HINT
- ERRATA_A57_826974
- ERRATA_A57_826977
- ERRATA_A57_828024
- ERRATA_A57_829520
- ERRATA_A57_833471
* Cortex-A53
=============
- A53_DISABLE_NON_TEMPORAL_HINT
- ERRATA_A53_826319
- ERRATA_A53_836870
Tegra210 uses Cortex-A57 revision: r1p1 and Cortex-A53 revision: r0p2.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'plat/nvidia/tegra/soc/t210/platform_t210.mk')
-rw-r--r-- | plat/nvidia/tegra/soc/t210/platform_t210.mk | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/plat/nvidia/tegra/soc/t210/platform_t210.mk b/plat/nvidia/tegra/soc/t210/platform_t210.mk index d0fe18f90d..822240f7fb 100644 --- a/plat/nvidia/tegra/soc/t210/platform_t210.mk +++ b/plat/nvidia/tegra/soc/t210/platform_t210.mk @@ -1,5 +1,5 @@ # -# Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. +# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions are met: @@ -54,6 +54,15 @@ BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \ ${SOC_DIR}/plat_setup.c \ ${SOC_DIR}/plat_secondary.c -# Enable workarounds for selected Cortex-A53 erratas. -ERRATA_A53_826319 := 1 +# Enable workarounds for selected Cortex-A57 erratas. +A57_DISABLE_NON_TEMPORAL_HINT := 1 +ERRATA_A57_826974 := 1 +ERRATA_A57_826977 := 1 +ERRATA_A57_828024 := 1 +ERRATA_A57_829520 := 1 +ERRATA_A57_833471 := 1 +# Enable workarounds for selected Cortex-A53 erratas. +A53_DISABLE_NON_TEMPORAL_HINT := 1 +ERRATA_A53_826319 := 1 +ERRATA_A53_836870 := 1 |