diff options
author | Varun Wadekar <vwadekar@nvidia.com> | 2016-01-27 11:31:06 -0800 |
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committer | Varun Wadekar <vwadekar@nvidia.com> | 2017-02-23 10:50:21 -0800 |
commit | 990c1e0113bdcbd17bab2954d2c216001503c509 (patch) | |
tree | ba075d050ed284f2c842964175a20cde6139a8f0 /plat/nvidia/tegra/soc/t210/plat_psci_handlers.c | |
parent | 9f9bafa34661e5e3506d9278fc07a0e6d24ea765 (diff) | |
download | trusted-firmware-a-990c1e0113bdcbd17bab2954d2c216001503c509.tar.gz |
Tegra: enable PSCI extended state ID processing
This patch enables the PSCI_EXTENDED_STATE_ID macro. Tegra platforms
have moved on to using the extended state ID for CPU_SUSPEND, where
the NS world passes the state ID and wakeup time as part of the
state ID field.
Change-Id: Ie8b0fec285d8b2330bc26ff239a4f628425c9fcf
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'plat/nvidia/tegra/soc/t210/plat_psci_handlers.c')
-rw-r--r-- | plat/nvidia/tegra/soc/t210/plat_psci_handlers.c | 37 |
1 files changed, 1 insertions, 36 deletions
diff --git a/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c b/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c index b184063d8f..332de2567a 100644 --- a/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c +++ b/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -58,39 +58,14 @@ static int cpu_powergate_mask[PLATFORM_MAX_CPUS_PER_CLUSTER]; int32_t tegra_soc_validate_power_state(unsigned int power_state, psci_power_state_t *req_state) { - int pwr_lvl = psci_get_pstate_pwrlvl(power_state); int state_id = psci_get_pstate_id(power_state); - if (pwr_lvl > PLAT_MAX_PWR_LVL) { - ERROR("%s: unsupported power_state (0x%x)\n", __func__, - power_state); - return PSCI_E_INVALID_PARAMS; - } - - /* Sanity check the requested afflvl */ - if (psci_get_pstate_type(power_state) == PSTATE_TYPE_STANDBY) { - /* - * It's possible to enter standby only on affinity level 0 i.e. - * a cpu on Tegra. Ignore any other affinity level. - */ - if (pwr_lvl != MPIDR_AFFLVL0) - return PSCI_E_INVALID_PARAMS; - - /* power domain in standby state */ - req_state->pwr_domain_state[pwr_lvl] = PLAT_MAX_RET_STATE; - - return PSCI_E_SUCCESS; - } - /* Sanity check the requested state id */ switch (state_id) { case PSTATE_ID_CORE_POWERDN: /* * Core powerdown request only for afflvl 0 */ - if (pwr_lvl != MPIDR_AFFLVL0) - goto error; - req_state->pwr_domain_state[MPIDR_AFFLVL0] = state_id & 0xff; break; @@ -100,9 +75,6 @@ int32_t tegra_soc_validate_power_state(unsigned int power_state, /* * Cluster powerdown/idle request only for afflvl 1 */ - if (pwr_lvl != MPIDR_AFFLVL1) - goto error; - req_state->pwr_domain_state[MPIDR_AFFLVL1] = state_id; req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; @@ -112,9 +84,6 @@ int32_t tegra_soc_validate_power_state(unsigned int power_state, /* * System powerdown request only for afflvl 2 */ - if (pwr_lvl != PLAT_MAX_PWR_LVL) - goto error; - for (int i = MPIDR_AFFLVL0; i < PLAT_MAX_PWR_LVL; i++) req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; @@ -129,10 +98,6 @@ int32_t tegra_soc_validate_power_state(unsigned int power_state, } return PSCI_E_SUCCESS; - -error: - ERROR("%s: unsupported state id (%d)\n", __func__, state_id); - return PSCI_E_INVALID_PARAMS; } int tegra_soc_pwr_domain_suspend(const psci_power_state_t *target_state) |