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authorVarun Wadekar <vwadekar@nvidia.com>2017-04-20 18:56:09 -0700
committerVarun Wadekar <vwadekar@nvidia.com>2017-04-20 19:02:21 -0700
commit63ac1a2a791a1eccebe508ec8d6b88888f075a52 (patch)
treee82831cada320ae0567052a12f92d7c7b2a6639d /plat/nvidia/tegra/soc/t186
parent85aa186ba11f49efef8e859cf5cab737c3ade26b (diff)
downloadtrusted-firmware-a-63ac1a2a791a1eccebe508ec8d6b88888f075a52.tar.gz
Tegra: smmu: make the context save sequence robust
This patch sanity checks the SMMU context created by the platform code. The first entry contains the size of the array; which the driver now verifies before moving on with the save. This patch also fixes an error in the calculation of the size of the context that gets copied to TZDRAM. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'plat/nvidia/tegra/soc/t186')
-rw-r--r--plat/nvidia/tegra/soc/t186/plat_psci_handlers.c12
-rw-r--r--plat/nvidia/tegra/soc/t186/plat_trampoline.S2
2 files changed, 6 insertions, 8 deletions
diff --git a/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c b/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
index 66a5999aff..9790b817a6 100644
--- a/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
+++ b/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
@@ -46,11 +46,8 @@
extern void prepare_cpu_pwr_dwn(void);
extern void tegra186_cpu_reset_handler(void);
-extern uint32_t __tegra186_cpu_reset_handler_data,
- __tegra186_cpu_reset_handler_end;
-
-/* TZDRAM offset for saving SMMU context */
-#define TEGRA186_SMMU_CTX_OFFSET 16
+extern uint32_t __tegra186_cpu_reset_handler_end,
+ __tegra186_smmu_context;
/* state id mask */
#define TEGRA186_STATE_ID_MASK 0xF
@@ -151,9 +148,8 @@ int tegra_soc_pwr_domain_suspend(const psci_power_state_t *target_state)
/* save SMMU context to TZDRAM */
smmu_ctx_base = params_from_bl2->tzdram_base +
- ((uintptr_t)&__tegra186_cpu_reset_handler_data -
- (uintptr_t)tegra186_cpu_reset_handler) +
- TEGRA186_SMMU_CTX_OFFSET;
+ ((uintptr_t)&__tegra186_smmu_context -
+ (uintptr_t)tegra186_cpu_reset_handler);
tegra_smmu_save_context((uintptr_t)smmu_ctx_base);
/* Prepare for system suspend */
diff --git a/plat/nvidia/tegra/soc/t186/plat_trampoline.S b/plat/nvidia/tegra/soc/t186/plat_trampoline.S
index 21393d9b96..ba696f397b 100644
--- a/plat/nvidia/tegra/soc/t186/plat_trampoline.S
+++ b/plat/nvidia/tegra/soc/t186/plat_trampoline.S
@@ -94,6 +94,8 @@ endfunc tegra186_cpu_reset_handler
__tegra186_cpu_reset_handler_data:
.quad tegra_secure_entrypoint
.quad __BL31_END__ - BL31_BASE
+ .globl __tegra186_smmu_context
+__tegra186_smmu_context:
.rept TEGRA186_SMMU_CTX_SIZE
.quad 0
.endr