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authorVarun Wadekar <vwadekar@nvidia.com>2018-12-10 13:20:49 -0800
committerVarun Wadekar <vwadekar@nvidia.com>2020-03-11 13:37:26 -0700
commit91dd7edd31c6626214c1198f60043067bba42f7c (patch)
tree9889eb6a77ae73dc57d4464e2ebab467ed6ee3b6 /plat/nvidia/tegra/common/drivers/smmu/smmu.c
parenta391d4942a4d34f5293a66e171682f6ca8d0010e (diff)
downloadtrusted-firmware-a-91dd7edd31c6626214c1198f60043067bba42f7c.tar.gz
Tegra: smmu: export handlers to read/write SMMU registers
This patch exports the SMMU register read/write handlers for platforms. Change-Id: If92f0d3ce820e4997c090b48be7614407bb582da Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'plat/nvidia/tegra/common/drivers/smmu/smmu.c')
-rw-r--r--plat/nvidia/tegra/common/drivers/smmu/smmu.c54
1 files changed, 0 insertions, 54 deletions
diff --git a/plat/nvidia/tegra/common/drivers/smmu/smmu.c b/plat/nvidia/tegra/common/drivers/smmu/smmu.c
index cc07d65494..a4a4354e8f 100644
--- a/plat/nvidia/tegra/common/drivers/smmu/smmu.c
+++ b/plat/nvidia/tegra/common/drivers/smmu/smmu.c
@@ -18,60 +18,6 @@
extern void memcpy16(void *dest, const void *src, unsigned int length);
-/* SMMU IDs currently supported by the driver */
-enum {
- TEGRA_SMMU0 = 0U,
- TEGRA_SMMU1,
- TEGRA_SMMU2
-};
-
-static uint32_t tegra_smmu_read_32(uint32_t smmu_id, uint32_t off)
-{
- uint32_t ret = 0U;
-
-#if defined(TEGRA_SMMU0_BASE)
- if (smmu_id == TEGRA_SMMU0) {
- ret = mmio_read_32(TEGRA_SMMU0_BASE + (uint64_t)off);
- }
-#endif
-
-#if defined(TEGRA_SMMU1_BASE)
- if (smmu_id == TEGRA_SMMU1) {
- ret = mmio_read_32(TEGRA_SMMU1_BASE + (uint64_t)off);
- }
-#endif
-
-#if defined(TEGRA_SMMU2_BASE)
- if (smmu_id == TEGRA_SMMU2) {
- ret = mmio_read_32(TEGRA_SMMU2_BASE + (uint64_t)off);
- }
-#endif
-
- return ret;
-}
-
-static void tegra_smmu_write_32(uint32_t smmu_id,
- uint32_t off, uint32_t val)
-{
-#if defined(TEGRA_SMMU0_BASE)
- if (smmu_id == TEGRA_SMMU0) {
- mmio_write_32(TEGRA_SMMU0_BASE + (uint64_t)off, val);
- }
-#endif
-
-#if defined(TEGRA_SMMU1_BASE)
- if (smmu_id == TEGRA_SMMU1) {
- mmio_write_32(TEGRA_SMMU1_BASE + (uint64_t)off, val);
- }
-#endif
-
-#if defined(TEGRA_SMMU2_BASE)
- if (smmu_id == TEGRA_SMMU2) {
- mmio_write_32(TEGRA_SMMU2_BASE + (uint64_t)off, val);
- }
-#endif
-}
-
#define SMMU_NUM_CONTEXTS 64U
#define SMMU_CONTEXT_BANK_MAX_IDX 64U