diff options
author | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2018-09-24 17:15:54 +0100 |
---|---|---|
committer | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2018-09-28 15:34:17 +0100 |
commit | b8424642bcbe38433eea0c332aaedadd78fd45d4 (patch) | |
tree | e9671d3f8af692b01acd1a8a641ac1c9aa997f4a /plat/mediatek/mt8173 | |
parent | 35795b4e878467300b3bdccc37d7486a9c8942c6 (diff) | |
download | trusted-firmware-a-b8424642bcbe38433eea0c332aaedadd78fd45d4.tar.gz |
mediatek: Migrate to new interfaces
- mt6795: Migrate to new GIC interfaces.
- Remove support for PSCI platform compatibility layer.
- Migrate to bl31_early_platform_setup2().
- Migrate from cm_init_context() to cm_init_my_context().
- Use PLAT_VIRT_ADDR_SPACE_SIZE and PLAT_PHY_ADDR_SPACE_SIZE.
- Update Makefile paths.
- Use private definition of bl31_params_t.
This is an incomplete migration, mt6795 doesn't currently compile.
Change-Id: Icf9307637066cd6f2166524715e4f117f5ce2350
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Diffstat (limited to 'plat/mediatek/mt8173')
-rw-r--r-- | plat/mediatek/mt8173/aarch64/plat_helpers.S | 2 | ||||
-rw-r--r-- | plat/mediatek/mt8173/aarch64/platform_common.c | 1 | ||||
-rw-r--r-- | plat/mediatek/mt8173/bl31_plat_setup.c | 22 | ||||
-rw-r--r-- | plat/mediatek/mt8173/include/platform_def.h | 2 | ||||
-rw-r--r-- | plat/mediatek/mt8173/plat_mt_gic.c | 2 | ||||
-rw-r--r-- | plat/mediatek/mt8173/plat_pm.c | 255 | ||||
-rw-r--r-- | plat/mediatek/mt8173/plat_topology.c | 26 | ||||
-rw-r--r-- | plat/mediatek/mt8173/platform.mk | 5 |
8 files changed, 11 insertions, 304 deletions
diff --git a/plat/mediatek/mt8173/aarch64/plat_helpers.S b/plat/mediatek/mt8173/aarch64/plat_helpers.S index 3e0b4f4289..d5894991db 100644 --- a/plat/mediatek/mt8173/aarch64/plat_helpers.S +++ b/plat/mediatek/mt8173/aarch64/plat_helpers.S @@ -36,7 +36,6 @@ func platform_is_primary_cpu ret endfunc platform_is_primary_cpu -#if !ENABLE_PLAT_COMPAT /* ----------------------------------------------------- * unsigned int plat_my_core_pos(void); * @@ -50,7 +49,6 @@ func plat_my_core_pos add x0, x1, x0, LSR #6 ret endfunc plat_my_core_pos -#endif /* --------------------------------------------- * int plat_crash_console_init(void) diff --git a/plat/mediatek/mt8173/aarch64/platform_common.c b/plat/mediatek/mt8173/aarch64/platform_common.c index 996344d2cc..a7619926a1 100644 --- a/plat/mediatek/mt8173/aarch64/platform_common.c +++ b/plat/mediatek/mt8173/aarch64/platform_common.c @@ -4,7 +4,6 @@ * SPDX-License-Identifier: BSD-3-Clause */ #include <arch_helpers.h> -#include <arm_gic.h> #include <bl_common.h> #include <cci.h> #include <debug.h> diff --git a/plat/mediatek/mt8173/bl31_plat_setup.c b/plat/mediatek/mt8173/bl31_plat_setup.c index e51bdbb9ea..ce5230963f 100644 --- a/plat/mediatek/mt8173/bl31_plat_setup.c +++ b/plat/mediatek/mt8173/bl31_plat_setup.c @@ -12,6 +12,7 @@ #include <mcucfg.h> #include <mmio.h> #include <mtcmos.h> +#include <mtk_plat_common.h> #include <plat_arm.h> #include <plat_private.h> #include <platform.h> @@ -91,19 +92,21 @@ entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) * BL2 has flushed this information to memory, so we are guaranteed to pick up * good data. ******************************************************************************/ -void bl31_early_platform_setup(bl31_params_t *from_bl2, - void *plat_params_from_bl2) +void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, + u_register_t arg2, u_register_t arg3) { + struct mtk_bl31_params *arg_from_bl2 = (struct mtk_bl31_params *)arg0; + console_init(MT8173_UART0_BASE, MT8173_UART_CLOCK, MT8173_BAUDRATE); VERBOSE("bl31_setup\n"); - assert(from_bl2 != NULL); - assert(from_bl2->h.type == PARAM_BL31); - assert(from_bl2->h.version >= VERSION_1); + assert(arg_from_bl2 != NULL); + assert(arg_from_bl2->h.type == PARAM_BL31); + assert(arg_from_bl2->h.version >= VERSION_1); - bl32_ep_info = *from_bl2->bl32_ep_info; - bl33_ep_info = *from_bl2->bl33_ep_info; + bl32_ep_info = *arg_from_bl2->bl32_ep_info; + bl33_ep_info = *arg_from_bl2->bl33_ep_info; } /******************************************************************************* @@ -120,11 +123,6 @@ void bl31_platform_setup(void) plat_arm_gic_driver_init(); plat_arm_gic_init(); -#if ENABLE_PLAT_COMPAT - /* Topologies are best known to the platform. */ - mt_setup_topology(); -#endif - /* Initialize spm at boot time */ spm_boot_init(); } diff --git a/plat/mediatek/mt8173/include/platform_def.h b/plat/mediatek/mt8173/include/platform_def.h index 6e3f4a3b42..9bbed3c3b9 100644 --- a/plat/mediatek/mt8173/include/platform_def.h +++ b/plat/mediatek/mt8173/include/platform_def.h @@ -36,11 +36,9 @@ #define FIRMWARE_WELCOME_STR "Booting Trusted Firmware\n" #define PLATFORM_MAX_AFFLVL MPIDR_AFFLVL2 -#if !ENABLE_PLAT_COMPAT #define PLAT_MAX_PWR_LVL U(2) #define PLAT_MAX_RET_STATE U(1) #define PLAT_MAX_OFF_STATE U(2) -#endif #define PLATFORM_SYSTEM_COUNT 1 #define PLATFORM_CLUSTER_COUNT 2 #define PLATFORM_CLUSTER0_CORE_COUNT 4 diff --git a/plat/mediatek/mt8173/plat_mt_gic.c b/plat/mediatek/mt8173/plat_mt_gic.c index c955d61840..16e36afbf7 100644 --- a/plat/mediatek/mt8173/plat_mt_gic.c +++ b/plat/mediatek/mt8173/plat_mt_gic.c @@ -3,7 +3,7 @@ * * SPDX-License-Identifier: BSD-3-Clause */ -#include <arm_gic.h> + #include <bl_common.h> #include <mt8173_def.h> #include <utils.h> diff --git a/plat/mediatek/mt8173/plat_pm.c b/plat/mediatek/mt8173/plat_pm.c index bc89ad9279..b19d3f307c 100644 --- a/plat/mediatek/mt8173/plat_pm.c +++ b/plat/mediatek/mt8173/plat_pm.c @@ -26,7 +26,6 @@ #include <spm_mcdi.h> #include <spm_suspend.h> -#if !ENABLE_PLAT_COMPAT #define MTK_PWR_LVL0 0 #define MTK_PWR_LVL1 1 #define MTK_PWR_LVL2 2 @@ -36,7 +35,6 @@ #define MTK_CLUSTER_PWR_STATE(state) (state)->pwr_domain_state[MTK_PWR_LVL1] #define MTK_SYSTEM_PWR_STATE(state) ((PLAT_MAX_PWR_LVL > MTK_PWR_LVL1) ?\ (state)->pwr_domain_state[MTK_PWR_LVL2] : 0) -#endif #if PSCI_EXTENDED_STATE_ID /* @@ -234,59 +232,6 @@ static void mt_platform_restore_context(unsigned long mpidr) mt_cpu_restore(mpidr); } -#if ENABLE_PLAT_COMPAT -/******************************************************************************* -* Private function which is used to determine if any platform actions -* should be performed for the specified affinity instance given its -* state. Nothing needs to be done if the 'state' is not off or if this is not -* the highest affinity level which will enter the 'state'. -*******************************************************************************/ -static int32_t plat_do_plat_actions(unsigned int afflvl, unsigned int state) -{ - unsigned int max_phys_off_afflvl; - - assert(afflvl <= MPIDR_AFFLVL2); - - if (state != PSCI_STATE_OFF) - return -EAGAIN; - - /* - * Find the highest affinity level which will be suspended and postpone - * all the platform specific actions until that level is hit. - */ - max_phys_off_afflvl = psci_get_max_phys_off_afflvl(); - assert(max_phys_off_afflvl != PSCI_INVALID_DATA); - if (afflvl != max_phys_off_afflvl) - return -EAGAIN; - - return 0; -} - -/******************************************************************************* - * MTK_platform handler called when an affinity instance is about to enter - * standby. - ******************************************************************************/ -static void plat_affinst_standby(unsigned int power_state) -{ - unsigned int target_afflvl; - - /* Sanity check the requested state */ - target_afflvl = psci_get_pstate_afflvl(power_state); - - /* - * It's possible to enter standby only on affinity level 0 i.e. a cpu - * on the MTK_platform. Ignore any other affinity level. - */ - if (target_afflvl == MPIDR_AFFLVL0) { - /* - * Enter standby state. dsb is good practice before using wfi - * to enter low power states. - */ - dsb(); - wfi(); - } -} -#else static void plat_cpu_standby(plat_local_state_t cpu_state) { unsigned int scr; @@ -298,47 +243,11 @@ static void plat_cpu_standby(plat_local_state_t cpu_state) wfi(); write_scr_el3(scr); } -#endif /******************************************************************************* * MTK_platform handler called when an affinity instance is about to be turned * on. The level and mpidr determine the affinity instance. ******************************************************************************/ -#if ENABLE_PLAT_COMPAT -static int plat_affinst_on(unsigned long mpidr, - unsigned long sec_entrypoint, - unsigned int afflvl, - unsigned int state) -{ - int rc = PSCI_E_SUCCESS; - unsigned long cpu_id; - unsigned long cluster_id; - uintptr_t rv; - - /* - * It's possible to turn on only affinity level 0 i.e. a cpu - * on the MTK_platform. Ignore any other affinity level. - */ - if (afflvl != MPIDR_AFFLVL0) - return rc; - - cpu_id = mpidr & MPIDR_CPU_MASK; - cluster_id = mpidr & MPIDR_CLUSTER_MASK; - - if (cluster_id) - rv = (uintptr_t)&mt8173_mcucfg->mp1_rv_addr[cpu_id].rv_addr_lw; - else - rv = (uintptr_t)&mt8173_mcucfg->mp0_rv_addr[cpu_id].rv_addr_lw; - - mmio_write_32(rv, sec_entrypoint); - INFO("mt_on[%ld:%ld], entry %x\n", - cluster_id, cpu_id, mmio_read_32(rv)); - - spm_hotplug_on(mpidr); - - return rc; -} -#else static uintptr_t secure_entrypoint; static int plat_power_domain_on(unsigned long mpidr) @@ -363,7 +272,6 @@ static int plat_power_domain_on(unsigned long mpidr) spm_hotplug_on(mpidr); return rc; } -#endif /******************************************************************************* * MTK_platform handler called when an affinity instance is about to be turned @@ -377,30 +285,6 @@ static int plat_power_domain_on(unsigned long mpidr) * dealt with. So do not write & read global variables across calls. It will be * wise to do flush a write to the global to prevent unpredictable results. ******************************************************************************/ -#if ENABLE_PLAT_COMPAT -static void plat_affinst_off(unsigned int afflvl, unsigned int state) -{ - unsigned long mpidr = read_mpidr_el1(); - - /* Determine if any platform actions need to be executed. */ - if (plat_do_plat_actions(afflvl, state) == -EAGAIN) - return; - - /* Prevent interrupts from spuriously waking up this cpu */ - gicv2_cpuif_disable(); - - spm_hotplug_off(mpidr); - - trace_power_flow(mpidr, CPU_DOWN); - - if (afflvl != MPIDR_AFFLVL0) { - /* Disable coherency if this cluster is to be turned off */ - plat_cci_disable(); - - trace_power_flow(mpidr, CLUSTER_DOWN); - } -} -#else static void plat_power_domain_off(const psci_power_state_t *state) { unsigned long mpidr = read_mpidr_el1(); @@ -419,7 +303,6 @@ static void plat_power_domain_off(const psci_power_state_t *state) trace_power_flow(mpidr, CLUSTER_DOWN); } } -#endif /******************************************************************************* * MTK_platform handler called when an affinity instance is about to be @@ -433,51 +316,6 @@ static void plat_power_domain_off(const psci_power_state_t *state) * dealt with. So do not write & read global variables across calls. It will be * wise to do flush a write to the global to prevent unpredictable results. ******************************************************************************/ -#if ENABLE_PLAT_COMPAT -static void plat_affinst_suspend(unsigned long sec_entrypoint, - unsigned int afflvl, - unsigned int state) -{ - unsigned long mpidr = read_mpidr_el1(); - unsigned long cluster_id; - unsigned long cpu_id; - uintptr_t rv; - - /* Determine if any platform actions need to be executed. */ - if (plat_do_plat_actions(afflvl, state) == -EAGAIN) - return; - - cpu_id = mpidr & MPIDR_CPU_MASK; - cluster_id = mpidr & MPIDR_CLUSTER_MASK; - - if (cluster_id) - rv = (uintptr_t)&mt8173_mcucfg->mp1_rv_addr[cpu_id].rv_addr_lw; - else - rv = (uintptr_t)&mt8173_mcucfg->mp0_rv_addr[cpu_id].rv_addr_lw; - - mmio_write_32(rv, sec_entrypoint); - - if (afflvl < MPIDR_AFFLVL2) - spm_mcdi_prepare_for_off_state(mpidr, afflvl); - - if (afflvl >= MPIDR_AFFLVL0) - mt_platform_save_context(mpidr); - - /* Perform the common cluster specific operations */ - if (afflvl >= MPIDR_AFFLVL1) { - /* Disable coherency if this cluster is to be turned off */ - plat_cci_disable(); - } - - if (afflvl >= MPIDR_AFFLVL2) { - disable_scu(mpidr); - generic_timer_backup(); - spm_system_suspend(); - /* Prevent interrupts from spuriously waking up this cpu */ - gicv2_cpuif_disable(); - } -} -#else static void plat_power_domain_suspend(const psci_power_state_t *state) { unsigned long mpidr = read_mpidr_el1(); @@ -517,7 +355,6 @@ static void plat_power_domain_suspend(const psci_power_state_t *state) gicv2_cpuif_disable(); } } -#endif /******************************************************************************* * MTK_platform handler called when an affinity instance has just been powered @@ -526,28 +363,6 @@ static void plat_power_domain_suspend(const psci_power_state_t *state) * was turned off prior to wakeup and do what's necessary to setup it up * correctly. ******************************************************************************/ -#if ENABLE_PLAT_COMPAT -static void plat_affinst_on_finish(unsigned int afflvl, unsigned int state) -{ - unsigned long mpidr = read_mpidr_el1(); - - /* Determine if any platform actions need to be executed. */ - if (plat_do_plat_actions(afflvl, state) == -EAGAIN) - return; - - /* Perform the common cluster specific operations */ - if (afflvl >= MPIDR_AFFLVL1) { - /* Enable coherency if this cluster was off */ - plat_cci_enable(); - trace_power_flow(mpidr, CLUSTER_UP); - } - - /* Enable the gic cpu interface */ - gicv2_cpuif_enable(); - gicv2_pcpu_distif_init(); - trace_power_flow(mpidr, CPU_UP); -} -#else void mtk_system_pwr_domain_resume(void); static void plat_power_domain_on_finish(const psci_power_state_t *state) @@ -574,44 +389,12 @@ static void plat_power_domain_on_finish(const psci_power_state_t *state) gicv2_pcpu_distif_init(); trace_power_flow(mpidr, CPU_UP); } -#endif /******************************************************************************* * MTK_platform handler called when an affinity instance has just been powered * on after having been suspended earlier. The level and mpidr determine the * affinity instance. ******************************************************************************/ -#if ENABLE_PLAT_COMPAT -static void plat_affinst_suspend_finish(unsigned int afflvl, unsigned int state) -{ - unsigned long mpidr = read_mpidr_el1(); - - /* Determine if any platform actions need to be executed. */ - if (plat_do_plat_actions(afflvl, state) == -EAGAIN) - return; - - if (afflvl >= MPIDR_AFFLVL2) { - /* Enable the gic cpu interface */ - plat_arm_gic_init(); - spm_system_suspend_finish(); - enable_scu(mpidr); - } - - /* Perform the common cluster specific operations */ - if (afflvl >= MPIDR_AFFLVL1) { - /* Enable coherency if this cluster was off */ - plat_cci_enable(); - } - - if (afflvl >= MPIDR_AFFLVL0) - mt_platform_restore_context(mpidr); - - if (afflvl < MPIDR_AFFLVL2) - spm_mcdi_finish_for_on_state(mpidr, afflvl); - - gicv2_pcpu_distif_init(); -} -#else static void plat_power_domain_suspend_finish(const psci_power_state_t *state) { unsigned long mpidr = read_mpidr_el1(); @@ -642,15 +425,7 @@ static void plat_power_domain_suspend_finish(const psci_power_state_t *state) gicv2_pcpu_distif_init(); } -#endif -#if ENABLE_PLAT_COMPAT -static unsigned int plat_get_sys_suspend_power_state(void) -{ - /* StateID: 0, StateType: 1(power down), PowerLevel: 2(system) */ - return psci_make_powerstate(0, 1, 2); -} -#else static void plat_get_sys_suspend_power_state(psci_power_state_t *req_state) { assert(PLAT_MAX_PWR_LVL >= 2); @@ -658,7 +433,6 @@ static void plat_get_sys_suspend_power_state(psci_power_state_t *req_state) for (int i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++) req_state->pwr_domain_state[i] = MTK_LOCAL_STATE_OFF; } -#endif /******************************************************************************* * MTK handlers to shutdown/reboot the system @@ -690,7 +464,6 @@ static void __dead2 plat_system_reset(void) panic(); } -#if !ENABLE_PLAT_COMPAT #if !PSCI_EXTENDED_STATE_ID static int plat_validate_power_state(unsigned int power_state, psci_power_state_t *req_state) @@ -775,34 +548,7 @@ void mtk_system_pwr_domain_resume(void) plat_arm_gic_init(); } -#endif - -#if ENABLE_PLAT_COMPAT -/******************************************************************************* - * Export the platform handlers to enable psci to invoke them - ******************************************************************************/ -static const plat_pm_ops_t plat_plat_pm_ops = { - .affinst_standby = plat_affinst_standby, - .affinst_on = plat_affinst_on, - .affinst_off = plat_affinst_off, - .affinst_suspend = plat_affinst_suspend, - .affinst_on_finish = plat_affinst_on_finish, - .affinst_suspend_finish = plat_affinst_suspend_finish, - .system_off = plat_system_off, - .system_reset = plat_system_reset, - .get_sys_suspend_power_state = plat_get_sys_suspend_power_state, -}; -/******************************************************************************* - * Export the platform specific power ops & initialize the mtk_platform power - * controller - ******************************************************************************/ -int platform_setup_pm(const plat_pm_ops_t **plat_ops) -{ - *plat_ops = &plat_plat_pm_ops; - return 0; -} -#else static const plat_psci_ops_t plat_plat_pm_ops = { .cpu_standby = plat_cpu_standby, .pwr_domain_on = plat_power_domain_on, @@ -852,4 +598,3 @@ plat_local_state_t plat_get_target_pwr_state(unsigned int lvl, return target; } -#endif diff --git a/plat/mediatek/mt8173/plat_topology.c b/plat/mediatek/mt8173/plat_topology.c index 5bb0451dce..d70fea5229 100644 --- a/plat/mediatek/mt8173/plat_topology.c +++ b/plat/mediatek/mt8173/plat_topology.c @@ -7,31 +7,6 @@ #include <platform_def.h> #include <psci.h> -#if ENABLE_PLAT_COMPAT -unsigned int plat_get_aff_count(unsigned int aff_lvl, unsigned long mpidr) -{ - /* Report 1 (absent) instance at levels higher that the cluster level */ - if (aff_lvl > MPIDR_AFFLVL1) - return PLATFORM_SYSTEM_COUNT; - - if (aff_lvl == MPIDR_AFFLVL1) - return PLATFORM_CLUSTER_COUNT; - - return mpidr & 0x100 ? PLATFORM_CLUSTER1_CORE_COUNT : - PLATFORM_CLUSTER0_CORE_COUNT; -} - -unsigned int plat_get_aff_state(unsigned int aff_lvl, unsigned long mpidr) -{ - return aff_lvl <= MPIDR_AFFLVL2 ? PSCI_AFF_PRESENT : PSCI_AFF_ABSENT; -} - -int mt_setup_topology(void) -{ - /* [TODO] Make topology configurable via SCC */ - return 0; -} -#else const unsigned char mtk_power_domain_tree_desc[] = { /* No of root nodes */ @@ -82,4 +57,3 @@ int plat_core_pos_by_mpidr(u_register_t mpidr) return (cpu_id + (cluster_id * 4)); } -#endif diff --git a/plat/mediatek/mt8173/platform.mk b/plat/mediatek/mt8173/platform.mk index 2eef81bb9e..294aea4f8b 100644 --- a/plat/mediatek/mt8173/platform.mk +++ b/plat/mediatek/mt8173/platform.mk @@ -56,11 +56,6 @@ BL31_SOURCES += drivers/arm/cci/cci.c \ ${MTK_PLAT_SOC}/power_tracer.c \ ${MTK_PLAT_SOC}/scu.c -# Flag used by the MTK_platform port to determine the version of ARM GIC -# architecture to use for interrupt management in EL3. -ARM_GIC_ARCH := 2 -$(eval $(call add_define,ARM_GIC_ARCH)) - # Enable workarounds for selected Cortex-A53 erratas. ERRATA_A53_826319 := 1 ERRATA_A53_836870 := 1 |