aboutsummaryrefslogtreecommitdiff
path: root/plat/marvell
diff options
context:
space:
mode:
authorAlex Leibovich <alexl@marvell.com>2019-12-25 09:22:48 +0200
committerManish Pandey <manish.pandey2@arm.com>2021-04-20 12:59:34 +0200
commitb81444e84382eaa6dca194c9542769670b0712f1 (patch)
tree3d5db6b3cab33f0afe710b15e30d4dde41f904db /plat/marvell
parent0cedca636fe07a62cf39548470baf3aaae9f008f (diff)
downloadtrusted-firmware-a-b81444e84382eaa6dca194c9542769670b0712f1.tar.gz
ddr_phy: use smc calls to access ddr phy registers
Added smc calls support to access ddr phy registers. Change-Id: Ibaa0a8e20b6398ab394c7e2e9ea61f9a28cdb870 Signed-off-by: Alex Leibovich <alexl@marvell.com> Reviewed-on: https://sj1git1.cavium.com/20791 Tested-by: Kostya Porotchkin <kostap@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Diffstat (limited to 'plat/marvell')
-rw-r--r--plat/marvell/armada/a8k/common/a8k_common.mk3
-rw-r--r--plat/marvell/armada/common/mrvl_sip_svc.c10
2 files changed, 12 insertions, 1 deletions
diff --git a/plat/marvell/armada/a8k/common/a8k_common.mk b/plat/marvell/armada/a8k/common/a8k_common.mk
index e20cf788a8..dcb64ce0f4 100644
--- a/plat/marvell/armada/a8k/common/a8k_common.mk
+++ b/plat/marvell/armada/a8k/common/a8k_common.mk
@@ -115,7 +115,8 @@ MARVELL_DRV := $(MARVELL_DRV_BASE)/io_win.c \
$(MARVELL_DRV_BASE)/comphy/phy-comphy-cp110.c \
$(MARVELL_DRV_BASE)/mc_trustzone/mc_trustzone.c \
$(MARVELL_DRV_BASE)/mg_conf_cm3/mg_conf_cm3.c \
- $(MARVELL_DRV_BASE)/secure_dfx_access/armada_thermal.c \
+ $(MARVELL_DRV_BASE)/secure_dfx_access/armada_thermal.c \
+ $(MARVELL_DRV_BASE)/ddr_phy_access.c \
drivers/rambus/trng_ip_76.c
BL31_PORTING_SOURCES := $(BOARD_DIR)/board/marvell_plat_config.c
diff --git a/plat/marvell/armada/common/mrvl_sip_svc.c b/plat/marvell/armada/common/mrvl_sip_svc.c
index aa94393013..ebc7632ac5 100644
--- a/plat/marvell/armada/common/mrvl_sip_svc.c
+++ b/plat/marvell/armada/common/mrvl_sip_svc.c
@@ -17,6 +17,7 @@
#include "comphy/phy-comphy-cp110.h"
#include "secure_dfx_access/dfx.h"
+#include "ddr_phy_access.h"
#include <stdbool.h>
/* #define DEBUG_COMPHY */
@@ -39,6 +40,8 @@
#define MV_SIP_PMU_IRQ_ENABLE 0x82000012
#define MV_SIP_PMU_IRQ_DISABLE 0x82000013
#define MV_SIP_DFX 0x82000014
+#define MV_SIP_DDR_PHY_WRITE 0x82000015
+#define MV_SIP_DDR_PHY_READ 0x82000016
/* TRNG */
#define MV_SIP_RNG_64 0xC200FF11
@@ -145,6 +148,13 @@ uintptr_t mrvl_sip_smc_handler(uint32_t smc_fid,
SMC_RET2(handle, ret, read);
}
SMC_RET1(handle, SMC_UNK);
+ case MV_SIP_DDR_PHY_WRITE:
+ ret = mvebu_ddr_phy_write(x1, x2);
+ SMC_RET1(handle, ret);
+ case MV_SIP_DDR_PHY_READ:
+ read = 0;
+ ret = mvebu_ddr_phy_read(x1, (uint16_t *)&read);
+ SMC_RET2(handle, ret, read);
case MV_SIP_RNG_64:
ret = eip76_rng_get_random((uint8_t *)&w2, 4 * (x1 % 2 + 1));
SMC_RET3(handle, ret, w2[0], w2[1]);