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authorKonstantin Porotchkin <kostap@marvell.com>2018-10-21 16:48:33 +0300
committerKonstantin Porotchkin <kostap@marvell.com>2018-12-04 14:09:44 +0200
commit5a9f00f707e9a560ed598dece9711a8640c8e55f (patch)
treea4fb1ce0a790e80dbbe0be531019e7fb70814d45 /plat/marvell/a8k/a80x0/board
parentd03f7a312274e9e61f42943be17d65d5385e2db6 (diff)
downloadtrusted-firmware-a-5a9f00f707e9a560ed598dece9711a8640c8e55f.tar.gz
plat/marvell: comphy: Add support for SFI on Lane 4
Add static configuration for SFI+ 10Gbps interface on SERDES Lane 4. This is just a copy of Lane 2 static values, not optimized. Board-to-board iperf test shows up to 6Gbps transfer speed. Change-Id: I024d2ac132f7fa6c342a64367f3dca2123a27e97 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com>
Diffstat (limited to 'plat/marvell/a8k/a80x0/board')
-rw-r--r--plat/marvell/a8k/a80x0/board/phy-porting-layer.h18
1 files changed, 16 insertions, 2 deletions
diff --git a/plat/marvell/a8k/a80x0/board/phy-porting-layer.h b/plat/marvell/a8k/a80x0/board/phy-porting-layer.h
index 38497fb536..abd85b5d25 100644
--- a/plat/marvell/a8k/a80x0/board/phy-porting-layer.h
+++ b/plat/marvell/a8k/a80x0/board/phy-porting-layer.h
@@ -27,7 +27,14 @@ static const struct xfi_params
.g1_rx_selmupf = 0x2, .g1_rx_selmupi = 0x2,
.valid = 0x1 }, /* Comphy2 */
{ 0 }, /* Comphy3 */
- { 0 }, /* Comphy4 */
+ { .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf,
+ .align90 = 0x5f,
+ .g1_dfe_res = 0x2, .g1_amp = 0x1c, .g1_emph = 0xe,
+ .g1_emph_en = 0x1, .g1_tx_amp_adj = 0x1,
+ .g1_tx_emph_en = 0x1, .g1_tx_emph = 0x0,
+ .g1_rx_selmuff = 0x1, .g1_rx_selmufi = 0x0,
+ .g1_rx_selmupf = 0x2, .g1_rx_selmupi = 0x2,
+ .valid = 0x1 }, /* Comphy4 */
{ 0 }, /* Comphy5 */
},
@@ -44,7 +51,14 @@ static const struct xfi_params
.g1_rx_selmupf = 0x2, .g1_rx_selmupi = 0x2,
.valid = 0x1 }, /* Comphy2 */
{ 0 }, /* Comphy3 */
- { 0 }, /* Comphy4 */
+ { .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf,
+ .align90 = 0x5f,
+ .g1_dfe_res = 0x2, .g1_amp = 0x1c, .g1_emph = 0xe,
+ .g1_emph_en = 0x1, .g1_tx_amp_adj = 0x1,
+ .g1_tx_emph_en = 0x1, .g1_tx_emph = 0x0,
+ .g1_rx_selmuff = 0x1, .g1_rx_selmufi = 0x0,
+ .g1_rx_selmupf = 0x2, .g1_rx_selmupi = 0x2,
+ .valid = 0x1 }, /* Comphy4 */
{ 0 }, /* Comphy5 */
},
},