diff options
author | Deepika Bhavnani <deepika.bhavnani@arm.com> | 2019-12-13 10:52:43 -0600 |
---|---|---|
committer | Soby Mathew <soby.mathew@arm.com> | 2020-01-24 13:15:40 +0000 |
commit | 08a64471aaf67830da2232eb7735e24e4f1fa332 (patch) | |
tree | 729ec8792d3678135a5a5f4f402a129a0f3ebc2c /plat/layerscape | |
parent | 47eb228868ae13374059a758382620a6ef13b808 (diff) | |
download | trusted-firmware-a-08a64471aaf67830da2232eb7735e24e4f1fa332.tar.gz |
layerscape: Unify Platform specific defines for PSCI module
PLATFORM_CORE_COUNT - Unsigned int
PLATFORM_CLUSTER_COUNT - Unsigned int
PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int
PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int
Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com>
Change-Id: Ib9f97be1972405e54dc9550266f5b8a6a55b93bf
Diffstat (limited to 'plat/layerscape')
-rw-r--r-- | plat/layerscape/board/ls1043/include/platform_def.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/plat/layerscape/board/ls1043/include/platform_def.h b/plat/layerscape/board/ls1043/include/platform_def.h index b6130001c4..8b0a94ae34 100644 --- a/plat/layerscape/board/ls1043/include/platform_def.h +++ b/plat/layerscape/board/ls1043/include/platform_def.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -19,18 +19,18 @@ #define FIRMWARE_WELCOME_STR_LS1043_BL32 "Welcome to LS1043 BL32 Phase, TSP\n" /* Required platform porting definitions */ -#define PLAT_PRIMARY_CPU 0x0 +#define PLAT_PRIMARY_CPU U(0x0) #define PLAT_MAX_PWR_LVL LS_PWR_LVL1 -#define PLATFORM_CORE_COUNT 4 +#define PLATFORM_CORE_COUNT U(4) #define COUNTER_FREQUENCY 25000000 /* 25MHz */ /* * Required LS standard platform porting definitions */ -#define PLAT_LS_CLUSTER_COUNT 1 -#define PLAT_LS1043_CCI_CLUSTER0_SL_IFACE_IX 4 -#define LS1043_CLUSTER_COUNT 1 -#define LS1043_MAX_CPUS_PER_CLUSTER 4 +#define PLAT_LS_CLUSTER_COUNT U(1) +#define PLAT_LS1043_CCI_CLUSTER0_SL_IFACE_IX U(4) +#define LS1043_CLUSTER_COUNT U(1) +#define LS1043_MAX_CPUS_PER_CLUSTER U(4) #define LS_DRAM1_BASE 0x80000000 #define LS_DRAM2_BASE 0x880000000 |