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authorIgor Opaniuk <igor.opaniuk@gmail.com>2020-03-16 22:55:42 +0200
committerIgor Opaniuk <igor.opaniuk@gmail.com>2020-03-16 23:21:36 +0200
commitfc1596b34761104f9384766d49286938b1dff622 (patch)
tree727b9b5d8d66551627a5312e22949494f88e3570 /plat/imx/imx8qm/imx8qm_bl31_setup.c
parent965c07815f1b1e90ef1f817090265fd870529257 (diff)
downloadtrusted-firmware-a-fc1596b34761104f9384766d49286938b1dff622.tar.gz
plat: imx: imx8qm: provide debug uart num as build param
This removes hardcoded iomux/clk/addr configuration for debug uart, provides possibility (as a workaround, till that information isn't provided via DT) to set this configuration during compile time via IMX_DEBUG_UART build flag. Usage: $ make PLAT=imx8qm IMX_DEBUG_UART=1 bl31 Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com> Change-Id: Ib5f5dd81ba0c8ad2b2dc5647ec75629072f511c5
Diffstat (limited to 'plat/imx/imx8qm/imx8qm_bl31_setup.c')
-rw-r--r--plat/imx/imx8qm/imx8qm_bl31_setup.c33
1 files changed, 25 insertions, 8 deletions
diff --git a/plat/imx/imx8qm/imx8qm_bl31_setup.c b/plat/imx/imx8qm/imx8qm_bl31_setup.c
index cffb140fb4..4ca6a5db4b 100644
--- a/plat/imx/imx8qm/imx8qm_bl31_setup.c
+++ b/plat/imx/imx8qm/imx8qm_bl31_setup.c
@@ -44,6 +44,22 @@ static entry_point_info_t bl33_image_ep_info;
(SC_PAD_28FDSOI_DSE_DV_LOW << PADRING_DSE_SHIFT) | \
(SC_PAD_28FDSOI_PS_PD << PADRING_PULL_SHIFT))
+#if defined(IMX_USE_UART0)
+#define IMX_RES_UART SC_R_UART_0
+#define IMX_PAD_UART_RX SC_P_UART0_RX
+#define IMX_PAD_UART_TX SC_P_UART0_TX
+#define IMX_PAD_UART_RTS_B SC_P_UART0_RTS_B
+#define IMX_PAD_UART_CTS_B SC_P_UART0_CTS_B
+#elif defined(IMX_USE_UART1)
+#define IMX_RES_UART SC_R_UART_1
+#define IMX_PAD_UART_RX SC_P_UART1_RX
+#define IMX_PAD_UART_TX SC_P_UART1_TX
+#define IMX_PAD_UART_RTS_B SC_P_UART1_RTS_B
+#define IMX_PAD_UART_CTS_B SC_P_UART1_CTS_B
+#else
+#error "Provide proper UART number in IMX_DEBUG_UART"
+#endif
+
const static int imx8qm_cci_map[] = {
CLUSTER0_CCI_SLVAE_IFACE,
CLUSTER1_CCI_SLVAE_IFACE
@@ -79,7 +95,7 @@ static void lpuart32_serial_setbrg(unsigned int base, int baudrate)
if (baudrate == 0)
panic();
- sc_pm_get_clock_rate(ipc_handle, SC_R_UART_0, 2, &rate);
+ sc_pm_get_clock_rate(ipc_handle, IMX_RES_UART, 2, &rate);
baud_diff = baudrate;
osr = 0;
@@ -301,16 +317,17 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
panic();
#if DEBUG_CONSOLE_A53
- sc_pm_set_resource_power_mode(ipc_handle, SC_R_UART_0, SC_PM_PW_MODE_ON);
+ sc_pm_set_resource_power_mode(ipc_handle, IMX_RES_UART,
+ SC_PM_PW_MODE_ON);
sc_pm_clock_rate_t rate = 80000000;
- sc_pm_set_clock_rate(ipc_handle, SC_R_UART_0, 2, &rate);
- sc_pm_clock_enable(ipc_handle, SC_R_UART_0, 2, true, false);
+ sc_pm_set_clock_rate(ipc_handle, IMX_RES_UART, 2, &rate);
+ sc_pm_clock_enable(ipc_handle, IMX_RES_UART, 2, true, false);
/* configure UART pads */
- sc_pad_set(ipc_handle, SC_P_UART0_RX, UART_PAD_CTRL);
- sc_pad_set(ipc_handle, SC_P_UART0_TX, UART_PAD_CTRL);
- sc_pad_set(ipc_handle, SC_P_UART0_RTS_B, UART_PAD_CTRL);
- sc_pad_set(ipc_handle, SC_P_UART0_CTS_B, UART_PAD_CTRL);
+ sc_pad_set(ipc_handle, IMX_PAD_UART_RX, UART_PAD_CTRL);
+ sc_pad_set(ipc_handle, IMX_PAD_UART_TX, UART_PAD_CTRL);
+ sc_pad_set(ipc_handle, IMX_PAD_UART_RTS_B, UART_PAD_CTRL);
+ sc_pad_set(ipc_handle, IMX_PAD_UART_CTS_B, UART_PAD_CTRL);
lpuart32_serial_init(IMX_BOOT_UART_BASE);
#endif