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author | Manish Pandey <manish.pandey2@arm.com> | 2021-06-10 15:22:48 +0100 |
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committer | Manish Pandey <manish.pandey2@arm.com> | 2021-06-29 11:59:01 +0100 |
commit | 7285fd5f9aa6d9cc0e0f1dc9c71785b46a88d999 (patch) | |
tree | 2fb9f1c658b6b668f3864454415641943d3012e2 /plat/arm/board | |
parent | a5394205e94b70faf7ddd34841528ec631711d1a (diff) | |
download | trusted-firmware-a-7285fd5f9aa6d9cc0e0f1dc9c71785b46a88d999.tar.gz |
feat(plat/arm): enable PIE when RESET_TO_SP_MIN=1
For Arm platforms PIE is enabled when RESET_TO_BL31=1 in aarch64 mode on
the similar lines enable PIE when RESET_TO_SP_MIN=1 in aarch32 mode.
The underlying changes for enabling PIE in aarch32 is submitted in
commit 4324a14bf
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ib8bb860198b3f97cdc91005503a3184d63e15469
Diffstat (limited to 'plat/arm/board')
-rw-r--r-- | plat/arm/board/fvp/include/platform_def.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/plat/arm/board/fvp/include/platform_def.h b/plat/arm/board/fvp/include/platform_def.h index c46ddbe927..8b25a5463b 100644 --- a/plat/arm/board/fvp/include/platform_def.h +++ b/plat/arm/board/fvp/include/platform_def.h @@ -150,12 +150,18 @@ #endif /* RESET_TO_BL31 */ #ifndef __aarch64__ +#if RESET_TO_SP_MIN +/* Size of Trusted SRAM - the first 4KB of shared memory */ +#define PLAT_ARM_MAX_BL32_SIZE (PLAT_ARM_TRUSTED_SRAM_SIZE - \ + ARM_SHARED_RAM_SIZE) +#else /* * Since BL32 NOBITS overlays BL2 and BL1-RW, PLAT_ARM_MAX_BL32_SIZE is * calculated using the current SP_MIN PROGBITS debug size plus the sizes of * BL2 and BL1-RW */ # define PLAT_ARM_MAX_BL32_SIZE UL(0x3B000) +#endif /* RESET_TO_SP_MIN */ #endif /* |