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author | Andre Przywara <andre.przywara@arm.com> | 2018-10-11 22:14:30 +0100 |
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committer | Andre Przywara <andre.przywara@arm.com> | 2018-10-20 16:23:59 +0100 |
commit | 4306051365e5b98efa5dc08b04b5b26caae99434 (patch) | |
tree | cfa2a8a51681cb64355dfb9e39132f251c84c0fb /plat/allwinner/common/include | |
parent | c3af6b0052b343943b8ed4e51658343c966bfc7a (diff) | |
download | trusted-firmware-a-4306051365e5b98efa5dc08b04b5b26caae99434.tar.gz |
allwinner: Disable USE_COHERENT_MEM
According to the documentation, platforms may choose to trade memory
footprint for performance (and elegancy) by not providing a separately
mapped coherent page.
Since a debug build is getting close to the SRAM size limit already, this
allows us to save about 3.5KB of BSS and have some room for future
enhancements.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'plat/allwinner/common/include')
-rw-r--r-- | plat/allwinner/common/include/platform_def.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/plat/allwinner/common/include/platform_def.h b/plat/allwinner/common/include/platform_def.h index b7cf30f5a3..4f9c00ed13 100644 --- a/plat/allwinner/common/include/platform_def.h +++ b/plat/allwinner/common/include/platform_def.h @@ -27,7 +27,7 @@ #define CACHE_WRITEBACK_SHIFT 6 #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) -#define MAX_MMAP_REGIONS (4 + PLATFORM_MMAP_REGIONS) +#define MAX_MMAP_REGIONS (3 + PLATFORM_MMAP_REGIONS) #define MAX_XLAT_TABLES 1 #define PLAT_MAX_PWR_LVL_STATES U(2) |