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authorJiafei Pan <Jiafei.Pan@nxp.com>2018-03-21 07:20:09 +0000
committerJiafei Pan <Jiafei.Pan@nxp.com>2018-04-07 10:12:21 +0800
commit7d173fc594d7d50c02e180c56c59ca1d3e51152e (patch)
tree8c04f896f7a0569bd7ba7a4baa0368c6be18f9b9 /make_helpers
parent93883a293145f6c85b3fc8c219f400e28b7d1491 (diff)
downloadtrusted-firmware-a-7d173fc594d7d50c02e180c56c59ca1d3e51152e.tar.gz
Add support for BL2 in XIP memory
In some use-cases BL2 will be stored in eXecute In Place (XIP) memory, like BL1. In these use-cases, it is necessary to initialize the RW sections in RAM, while leaving the RO sections in place. This patch enable this use-case with a new build option, BL2_IN_XIP_MEM. For now, this option is only supported when BL2_AT_EL3 is 1. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Diffstat (limited to 'make_helpers')
-rw-r--r--make_helpers/defaults.mk4
1 files changed, 4 insertions, 0 deletions
diff --git a/make_helpers/defaults.mk b/make_helpers/defaults.mk
index 751f8343c6..77eb157c69 100644
--- a/make_helpers/defaults.mk
+++ b/make_helpers/defaults.mk
@@ -30,6 +30,10 @@ BASE_COMMIT := origin/master
# Execute BL2 at EL3
BL2_AT_EL3 := 0
+# BL2 image is stored in XIP memory, for now, this option is only supported
+# when BL2_AT_EL3 is 1.
+BL2_IN_XIP_MEM := 0
+
# By default, consider that the platform may release several CPUs out of reset.
# The platform Makefile is free to override this value.
COLD_BOOT_SINGLE_CPU := 0