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authorJeenu Viswambharan <jeenu.viswambharan@arm.com>2016-10-24 14:31:51 +0100
committerJeenu Viswambharan <jeenu.viswambharan@arm.com>2016-11-08 09:00:44 +0000
commit2fae4b1e0714685a60ad278ce302fdb752543b5f (patch)
tree539c8304d81f212e112790baa1863d236ff07c99 /make_helpers/defaults.mk
parent01920cfdf9d1b2ac7064fa2df4c46130d81f168d (diff)
downloadtrusted-firmware-a-2fae4b1e0714685a60ad278ce302fdb752543b5f.tar.gz
build: Reorder build variables alphabetically
When build variables are assigned or processed en masse, they'd appear neater in alphabetical order. Static initializations are moved to a separate file, make_helpers/defaults.mk, which in itself is sorted alphabetically. No functional changes. Change-Id: I966010042b33de6b67592fb9ffcef8fc44d7d128 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Diffstat (limited to 'make_helpers/defaults.mk')
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1 files changed, 142 insertions, 0 deletions
diff --git a/make_helpers/defaults.mk b/make_helpers/defaults.mk
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+#
+# Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# Redistributions of source code must retain the above copyright notice, this
+# list of conditions and the following disclaimer.
+#
+# Redistributions in binary form must reproduce the above copyright notice,
+# this list of conditions and the following disclaimer in the documentation
+# and/or other materials provided with the distribution.
+#
+# Neither the name of ARM nor the names of its contributors may be used
+# to endorse or promote products derived from this software without specific
+# prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+# Default, static values for build variables, listed in alphabetic order.
+# Dependencies between build options, if any, are handled in the top-level
+# Makefile, after this file is included. This ensures that the former is better
+# poised to handle dependencies, as all build variables would have a default
+# value by then.
+
+# The AArch32 Secure Payload to be built as BL32 image
+AARCH32_SP := none
+
+# The Target build architecture. Supported values are: aarch64, aarch32.
+ARCH := aarch64
+
+# Determine the version of ARM CCI product used in the platform. The platform
+# port can change this value if needed.
+ARM_CCI_PRODUCT_ID := 400
+
+# Determine the version of ARM GIC architecture to use for interrupt management
+# in EL3. The platform port can change this value if needed.
+ARM_GIC_ARCH := 2
+
+# Flag used to indicate if ASM_ASSERTION should be enabled for the build.
+ASM_ASSERTION := 0
+
+# Base commit to perform code check on
+BASE_COMMIT := origin/master
+
+# By default, consider that the platform may release several CPUs out of reset.
+# The platform Makefile is free to override this value.
+COLD_BOOT_SINGLE_CPU := 0
+
+# For Chain of Trust
+CREATE_KEYS := 1
+
+# Build flag to include AArch32 registers in cpu context save and restore during
+# world switch. This flag must be set to 0 for AArch64-only platforms.
+CTX_INCLUDE_AARCH32_REGS := 1
+
+# Include FP registers in cpu context
+CTX_INCLUDE_FPREGS := 0
+
+# Debug build
+DEBUG := 0
+
+# Build platform
+DEFAULT_PLAT := fvp
+
+# By default, use the -pedantic option in the gcc command line
+DISABLE_PEDANTIC := 0
+
+# Flag to enable Performance Measurement Framework
+ENABLE_PMF := 0
+
+# Flag to enable PSCI STATs functionality
+ENABLE_PSCI_STAT := 0
+
+# Flag to enable runtime instrumentation using PMF
+ENABLE_RUNTIME_INSTRUMENTATION := 0
+
+# Build flag to treat usage of deprecated platform and framework APIs as error.
+ERROR_DEPRECATED := 0
+
+# Default FIP file name
+FIP_NAME := fip.bin
+
+# Default FWU_FIP file name
+FWU_FIP_NAME := fwu_fip.bin
+
+# For Chain of Trust
+GENERATE_COT := 0
+
+# Flag to enable new version of image loading
+LOAD_IMAGE_V2 := 0
+
+# NS timer register save and restore
+NS_TIMER_SWITCH := 0
+
+# Build PL011 UART driver in minimal generic UART mode
+PL011_GENERIC_UART := 0
+
+# By default, consider that the platform's reset address is not programmable.
+# The platform Makefile is free to override this value.
+PROGRAMMABLE_RESET_ADDRESS := 0
+
+# Flag used to choose the power state format viz Extended State-ID or the
+# Original format.
+PSCI_EXTENDED_STATE_ID := 0
+
+# By default, BL1 acts as the reset handler, not BL31
+RESET_TO_BL31 := 0
+
+# For Chain of Trust
+SAVE_KEYS := 0
+
+# Whether code and read-only data should be put on separate memory pages. The
+# platform Makefile is free to override this value.
+SEPARATE_CODE_AND_RODATA := 0
+
+# SPD choice
+SPD := none
+
+# Flag to introduce an infinite loop in BL1 just before it exits into the next
+# image. This is meant to help debugging the post-BL2 phase.
+SPIN_ON_BL1_EXIT := 0
+
+# Flags to build TF with Trusted Boot support
+TRUSTED_BOARD_BOOT := 0
+
+# Build option to choose whether Trusted firmware uses Coherent memory or not.
+USE_COHERENT_MEM := 1
+
+# Build verbosity
+V := 0