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author | laurenw-arm <lauren.wehrmeister@arm.com> | 2020-07-14 14:18:34 -0500 |
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committer | laurenw-arm <lauren.wehrmeister@arm.com> | 2020-09-25 15:41:56 -0500 |
commit | aa3efe3df81429ef696dfe7fcb9ad9ef7ce86f6c (patch) | |
tree | 20b2a75b13cec23588e00af85c5f0a91cb67f3fb /lib | |
parent | 73740d98d99cb740ff67e188b6a7c1db816bf9f4 (diff) | |
download | trusted-firmware-a-aa3efe3df81429ef696dfe7fcb9ad9ef7ce86f6c.tar.gz |
Workaround for Cortex A77 erratum 1508412
Cortex A77 erratum 1508412 is a Cat B Errata present in r0p0 and r1p0.
The workaround is a write sequence to several implementation defined
registers based on A77 revision.
This errata is explained in this SDEN:
https://static.docs.arm.com/101992/0010/Arm_Cortex_A77_MP074_Software_Developer_Errata_Notice_v10.pdf
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I217993cffb3ac57c313db8490e7b8a7bb393379b
Diffstat (limited to 'lib')
-rw-r--r-- | lib/cpus/aarch64/cortex_a77.S | 70 | ||||
-rw-r--r-- | lib/cpus/cpu-ops.mk | 8 |
2 files changed, 78 insertions, 0 deletions
diff --git a/lib/cpus/aarch64/cortex_a77.S b/lib/cpus/aarch64/cortex_a77.S index 0c30460d4d..ea219998f4 100644 --- a/lib/cpus/aarch64/cortex_a77.S +++ b/lib/cpus/aarch64/cortex_a77.S @@ -22,6 +22,70 @@ #endif /* -------------------------------------------------- + * Errata Workaround for Cortex A77 Errata #1508412. + * This applies only to revision <= r1p0 of Cortex A77. + * Inputs: + * x0: variant[4:7] and revision[0:3] of current cpu. + * Shall clobber: x0-x17 + * -------------------------------------------------- + */ +func errata_a77_1508412_wa + /* + * Compare x0 against revision r1p0 + */ + mov x17, x30 + bl check_errata_1508412 + cbz x0, 3f + /* + * Compare x0 against revision r0p0 + */ + bl check_errata_1508412_0 + cbz x0, 1f + ldr x0, =0x0 + msr CORTEX_A77_CPUPSELR_EL3, x0 + ldr x0, =0x00E8400000 + msr CORTEX_A77_CPUPOR_EL3, x0 + ldr x0, =0x00FFE00000 + msr CORTEX_A77_CPUPMR_EL3, x0 + ldr x0, =0x4004003FF + msr CORTEX_A77_CPUPCR_EL3, x0 + ldr x0, =0x1 + msr CORTEX_A77_CPUPSELR_EL3, x0 + ldr x0, =0x00E8C00040 + msr CORTEX_A77_CPUPOR_EL3, x0 + ldr x0, =0x00FFE00040 + msr CORTEX_A77_CPUPMR_EL3, x0 + b 2f +1: + ldr x0, =0x0 + msr CORTEX_A77_CPUPSELR_EL3, x0 + ldr x0, =0x00E8400000 + msr CORTEX_A77_CPUPOR_EL3, x0 + ldr x0, =0x00FF600000 + msr CORTEX_A77_CPUPMR_EL3, x0 + ldr x0, =0x00E8E00080 + msr CORTEX_A77_CPUPOR2_EL3, x0 + ldr x0, =0x00FFE000C0 + msr CORTEX_A77_CPUPMR2_EL3, x0 +2: + ldr x0, =0x04004003FF + msr CORTEX_A77_CPUPCR_EL3, x0 + isb +3: + ret x17 +endfunc errata_a77_1508412_wa + +func check_errata_1508412 + mov x1, #0x10 + b cpu_rev_var_ls +endfunc check_errata_1508412 + +func check_errata_1508412_0 + mov x1, #0x0 + b cpu_rev_var_ls +endfunc check_errata_1508412_0 + + /* -------------------------------------------------- * Errata Workaround for Cortex A77 Errata #1800714. * This applies to revision <= r1p1 of Cortex A77. * Inputs: @@ -60,6 +124,11 @@ func cortex_a77_reset_func bl cpu_get_rev_var mov x18, x0 +#if ERRATA_A77_1508412 + mov x0, x18 + bl errata_a77_1508412_wa +#endif + #if ERRATA_A77_1800714 mov x0, x18 bl errata_a77_1800714_wa @@ -98,6 +167,7 @@ func cortex_a77_errata_report * Report all errata. The revision-variant information is passed to * checking functions of each errata. */ + report_errata ERRATA_A77_1508412, cortex_a77, 1508412 report_errata ERRATA_A77_1800714, cortex_a77, 1800714 ldp x8, x30, [sp], #16 diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index 7cd8ed99e3..5df94cce46 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -278,6 +278,10 @@ ERRATA_A76_1800710 ?=0 # to all revisions of Cortex A76 cpu. ERRATA_A76_1165522 ?=0 +# Flag to apply erratum 1508412 workaround during reset. This erratum applies +# only to revision <= r1p0 of the Cortex A77 cpu. +ERRATA_A77_1508412 ?=0 + # Flag to apply erratum 1800714 workaround during reset. This erratum applies # only to revision <= r1p1 of the Cortex A77 cpu. ERRATA_A77_1800714 ?=0 @@ -551,6 +555,10 @@ $(eval $(call add_define,ERRATA_A76_1800710)) $(eval $(call assert_boolean,ERRATA_A76_1165522)) $(eval $(call add_define,ERRATA_A76_1165522)) +# Process ERRATA_A77_1508412 flag +$(eval $(call assert_boolean,ERRATA_A77_1508412)) +$(eval $(call add_define,ERRATA_A77_1508412)) + # Process ERRATA_A77_1800714 flag $(eval $(call assert_boolean,ERRATA_A77_1800714)) $(eval $(call add_define,ERRATA_A77_1800714)) |