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authorSoby Mathew <soby.mathew@arm.com>2016-04-29 19:01:30 +0100
committerSoby Mathew <soby.mathew@arm.com>2016-07-19 10:19:01 +0100
commitcf0b1492ede6cbbf788144a56d276d8d7924500a (patch)
treee9c92fdc4021598fed52484d1a11100dbebc2b19 /lib/psci/psci_common.c
parent532ed6183868036e4a4f83cd7a71b93266a3bdb7 (diff)
downloadtrusted-firmware-a-cf0b1492ede6cbbf788144a56d276d8d7924500a.tar.gz
Introduce PSCI Library Interface
This patch introduces the PSCI Library interface. The major changes introduced are as follows: * Earlier BL31 was responsible for Architectural initialization during cold boot via bl31_arch_setup() whereas PSCI was responsible for the same during warm boot. This functionality is now consolidated by the PSCI library and it does Architectural initialization via psci_arch_setup() during both cold and warm boots. * Earlier the warm boot entry point was always `psci_entrypoint()`. This was not flexible enough as a library interface. Now PSCI expects the runtime firmware to provide the entry point via `psci_setup()`. A new function `bl31_warm_entrypoint` is introduced in BL31 and the previous `psci_entrypoint()` is deprecated. * The `smc_helpers.h` is reorganized to separate the SMC Calling Convention defines from the Trusted Firmware SMC helpers. The former is now in a new header file `smcc.h` and the SMC helpers are moved to Architecture specific header. * The CPU context is used by PSCI for context initialization and restoration after power down (PSCI Context). It is also used by BL31 for SMC handling and context management during Normal-Secure world switch (SMC Context). The `psci_smc_handler()` interface is redefined to not use SMC helper macros thus enabling to decouple the PSCI context from EL3 runtime firmware SMC context. This enables PSCI to be integrated with other runtime firmware using a different SMC context. NOTE: With this patch the architectural setup done in `bl31_arch_setup()` is done as part of `psci_setup()` and hence `bl31_platform_setup()` will be invoked prior to architectural setup. It is highly unlikely that the platform setup will depend on architectural setup and cause any failure. Please be be aware of this change in sequence. Change-Id: I7f497a08d33be234bbb822c28146250cb20dab73
Diffstat (limited to 'lib/psci/psci_common.c')
-rw-r--r--lib/psci/psci_common.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/psci/psci_common.c b/lib/psci/psci_common.c
index 2a0afb4c35..c6fea5b046 100644
--- a/lib/psci/psci_common.c
+++ b/lib/psci/psci_common.c
@@ -683,7 +683,7 @@ int psci_validate_entry_point(entry_point_info_t *ep,
* code to enable the gic cpu interface and for a cluster it will enable
* coherency at the interconnect level in addition to gic cpu interface.
******************************************************************************/
-void psci_power_up_finish(void)
+void psci_warmboot_entrypoint(void)
{
unsigned int end_pwrlvl, cpu_idx = plat_my_core_pos();
psci_power_state_t state_info = { {PSCI_LOCAL_STATE_RUN} };