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authorlauwal01 <lauren.wehrmeister@arm.com>2019-06-24 11:47:30 -0500
committerlauwal01 <lauren.wehrmeister@arm.com>2019-07-02 09:17:17 -0500
commit11c48370bd8c1dfdf5221a073a26615904c94413 (patch)
tree00db093dd1481dc07924f494580abf82f326554b /lib/cpus
parent411f4959b45b7a072b567dadf33b110936f14f32 (diff)
downloadtrusted-firmware-a-11c48370bd8c1dfdf5221a073a26615904c94413.tar.gz
Workaround for Neoverse N1 erratum 1262888
Neoverse N1 erratum 1262888 is a Cat B erratum [1], present in older revisions of the Neoverse N1 processor core. The workaround is to set a bit in the implementation defined CPUECTLR_EL1 system register, which disables the MMU hardware prefetcher. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-466751330-10325/index.html Change-Id: Ib733d748e32a7ea6a2783f3d5a9c5e13eee01105 Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Diffstat (limited to 'lib/cpus')
-rw-r--r--lib/cpus/aarch64/neoverse_n1.S33
-rw-r--r--lib/cpus/cpu-ops.mk8
2 files changed, 41 insertions, 0 deletions
diff --git a/lib/cpus/aarch64/neoverse_n1.S b/lib/cpus/aarch64/neoverse_n1.S
index 6004575730..d5f2247381 100644
--- a/lib/cpus/aarch64/neoverse_n1.S
+++ b/lib/cpus/aarch64/neoverse_n1.S
@@ -266,6 +266,33 @@ func check_errata_1262606
endfunc check_errata_1262606
/* --------------------------------------------------
+ * Errata Workaround for Neoverse N1 Errata #1262888
+ * This applies to revision <=r3p0 of Neoverse N1.
+ * Inputs:
+ * x0: variant[4:7] and revision[0:3] of current cpu.
+ * Shall clobber: x0-x17
+ * --------------------------------------------------
+ */
+func errata_n1_1262888_wa
+ /* Compare x0 against revision r3p0 */
+ mov x17, x30
+ bl check_errata_1262888
+ cbz x0, 1f
+ mrs x1, NEOVERSE_N1_CPUECTLR_EL1
+ orr x1, x1, NEOVERSE_N1_CPUECTLR_EL1_MM_TLBPF_DIS_BIT
+ msr NEOVERSE_N1_CPUECTLR_EL1, x1
+ isb
+1:
+ ret x17
+endfunc errata_n1_1262888_wa
+
+func check_errata_1262888
+ /* Applies to <=r3p0 */
+ mov x1, #0x30
+ b cpu_rev_var_ls
+endfunc check_errata_1262888
+
+/* --------------------------------------------------
* Errata Workaround for Neoverse N1 Erratum 1315703.
* This applies to revision <= r3p0 of Neoverse N1.
* Inputs:
@@ -348,6 +375,11 @@ func neoverse_n1_reset_func
bl errata_n1_1262606_wa
#endif
+#if ERRATA_N1_1262888
+ mov x0, x18
+ bl errata_n1_1262888_wa
+#endif
+
#if ERRATA_N1_1315703
mov x0, x18
bl errata_n1_1315703_wa
@@ -417,6 +449,7 @@ func neoverse_n1_errata_report
report_errata ERRATA_N1_1220197, neoverse_n1, 1220197
report_errata ERRATA_N1_1257314, neoverse_n1, 1257314
report_errata ERRATA_N1_1262606, neoverse_n1, 1262606
+ report_errata ERRATA_N1_1262888, neoverse_n1, 1262888
report_errata ERRATA_N1_1315703, neoverse_n1, 1315703
report_errata ERRATA_DSU_936184, neoverse_n1, dsu_936184
diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk
index befb45eb04..2f13696d6f 100644
--- a/lib/cpus/cpu-ops.mk
+++ b/lib/cpus/cpu-ops.mk
@@ -266,6 +266,10 @@ ERRATA_N1_1257314 ?=0
# only to revision <= r3p0 of the Neoverse N1 cpu.
ERRATA_N1_1262606 ?=0
+# Flag to apply erratum 1262888 workaround during reset. This erratum applies
+# only to revision <= r3p0 of the Neoverse N1 cpu.
+ERRATA_N1_1262888 ?=0
+
# Flag to apply erratum 1315703 workaround during reset. This erratum applies
# to revisions before r3p1 of the Neoverse N1 cpu.
ERRATA_N1_1315703 ?=1
@@ -487,6 +491,10 @@ $(eval $(call add_define,ERRATA_N1_1257314))
$(eval $(call assert_boolean,ERRATA_N1_1262606))
$(eval $(call add_define,ERRATA_N1_1262606))
+# Process ERRATA_N1_1262888 flag
+$(eval $(call assert_boolean,ERRATA_N1_1262888))
+$(eval $(call add_define,ERRATA_N1_1262888))
+
# Process ERRATA_N1_1315703 flag
$(eval $(call assert_boolean,ERRATA_N1_1315703))
$(eval $(call add_define,ERRATA_N1_1315703))