diff options
author | Roberto Vargas <roberto.vargas@arm.com> | 2017-10-30 14:43:43 +0000 |
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committer | Roberto Vargas <roberto.vargas@arm.com> | 2018-01-18 09:42:35 +0000 |
commit | b1d27b484f4172542eca074fdac42ffd13736a0f (patch) | |
tree | aa9ceb97f7bb103de9bfc7237169aa3e833c2ba7 /lib/cpus/aarch32/cpu_helpers.S | |
parent | 34c2b9c2f144e213533c00bbdedb8da5b786311b (diff) | |
download | trusted-firmware-a-b1d27b484f4172542eca074fdac42ffd13736a0f.tar.gz |
bl2-el3: Add BL2_EL3 image
This patch enables BL2 to execute at the highest exception level
without any dependancy on TF BL1. This enables platforms which already
have a non-TF Boot ROM to directly load and execute BL2 and subsequent BL
stages without need for BL1. This is not currently possible because
BL2 executes at S-EL1 and cannot jump straight to EL3.
Change-Id: Ief1efca4598560b1b8c8e61fbe26d1f44e929d69
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Diffstat (limited to 'lib/cpus/aarch32/cpu_helpers.S')
-rw-r--r-- | lib/cpus/aarch32/cpu_helpers.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/cpus/aarch32/cpu_helpers.S b/lib/cpus/aarch32/cpu_helpers.S index bfdc1e4f9a..72e42c6745 100644 --- a/lib/cpus/aarch32/cpu_helpers.S +++ b/lib/cpus/aarch32/cpu_helpers.S @@ -10,7 +10,7 @@ #include <cpu_data.h> #include <cpu_macros.S> -#if defined(IMAGE_BL1) || defined(IMAGE_BL32) +#if defined(IMAGE_BL1) || defined(IMAGE_BL32) || (defined(IMAGE_BL2) && BL2_AT_EL3) /* * The reset handler common to all platforms. After a matching * cpu_ops structure entry is found, the correponding reset_handler @@ -42,7 +42,7 @@ func reset_handler bx lr endfunc reset_handler -#endif /* IMAGE_BL1 || IMAGE_BL32 */ +#endif #ifdef IMAGE_BL32 /* The power down core and cluster is needed only in BL32 */ /* |