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authorSoby Mathew <soby.mathew@arm.com>2014-07-14 16:58:03 +0100
committerSoby Mathew <soby.mathew@arm.com>2014-07-28 11:01:49 +0100
commitbc9201289c9ae4ccfc6b11048431d47eba547a44 (patch)
treedf1daa872e1231f48cdc2b2ac524940d82af9398 /lib/aarch64
parentc67b09bd2cf04cac2160968907f0a9fc65472a11 (diff)
downloadtrusted-firmware-a-bc9201289c9ae4ccfc6b11048431d47eba547a44.tar.gz
Implement an assert() callable from assembly code
The patch implements a macro ASM_ASSERT() which can be invoked from assembly code. When assertion happens, file name and line number of the check is written to the crash console. Fixes ARM-software/tf-issues#95 Change-Id: I6f905a068e1c0fa4f746d723f18df60daaa00a86
Diffstat (limited to 'lib/aarch64')
-rw-r--r--lib/aarch64/misc_helpers.S12
1 files changed, 10 insertions, 2 deletions
diff --git a/lib/aarch64/misc_helpers.S b/lib/aarch64/misc_helpers.S
index 439ca28570..f605bf408a 100644
--- a/lib/aarch64/misc_helpers.S
+++ b/lib/aarch64/misc_helpers.S
@@ -30,6 +30,7 @@
#include <arch.h>
#include <asm_macros.S>
+#include <assert_macros.S>
.globl get_afflvl_shift
.globl mpidr_mask_lower_afflvls
@@ -46,7 +47,6 @@
.globl enable_vfp
#endif
-
func get_afflvl_shift
cmp x0, #3
cinc x0, x0, eq
@@ -79,6 +79,10 @@ func smc
* -----------------------------------------------------------------------
*/
func zeromem16
+#if ASM_ASSERTION
+ tst x0, #0xf
+ ASM_ASSERT(eq)
+#endif
add x2, x0, x1
/* zero 16 bytes at a time */
z_loop16:
@@ -105,6 +109,11 @@ z_end: ret
* --------------------------------------------------------------------------
*/
func memcpy16
+#if ASM_ASSERTION
+ orr x3, x0, x1
+ tst x3, #0xf
+ ASM_ASSERT(eq)
+#endif
/* copy 16 bytes at a time */
m_loop16:
cmp x2, #16
@@ -145,7 +154,6 @@ func disable_mmu_icache_el3
mov x1, #(SCTLR_M_BIT | SCTLR_C_BIT | SCTLR_I_BIT)
b do_disable_mmu
-
/* ---------------------------------------------------------------------------
* Enable the use of VFP at EL3
* ---------------------------------------------------------------------------