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authorjohpow01 <john.powell@arm.com>2021-04-20 17:05:04 -0500
committerjohpow01 <john.powell@arm.com>2021-04-20 17:14:31 -0500
commit97bc7f0dcc398dd45f5fe2c979aa74a7999d6681 (patch)
treee8a62f42eb5c188314d1c83296ad91286e6d03db /include
parent38b7c9c651c304bed9eea47905fc3072fb2af24e (diff)
downloadtrusted-firmware-a-97bc7f0dcc398dd45f5fe2c979aa74a7999d6681.tar.gz
Add "_arm" suffix to Makalu ELP CPU lib
ELP processors can sometimes have different MIDR values or features so we are adding the "_arm" suffix to differentiate the reference implementation from other future versions. Signed-off-by: John Powell <john.powell@arm.com> Change-Id: Ieea444288587c7c18a397d279ee4b22b7ad79e20
Diffstat (limited to 'include')
-rw-r--r--include/lib/cpus/aarch64/cortex_makalu_elp_arm.h (renamed from include/lib/cpus/aarch64/cortex_makalu_elp.h)14
1 files changed, 7 insertions, 7 deletions
diff --git a/include/lib/cpus/aarch64/cortex_makalu_elp.h b/include/lib/cpus/aarch64/cortex_makalu_elp_arm.h
index 4a1699635f..a0d788e39f 100644
--- a/include/lib/cpus/aarch64/cortex_makalu_elp.h
+++ b/include/lib/cpus/aarch64/cortex_makalu_elp_arm.h
@@ -4,20 +4,20 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef CORTEX_MAKALU_ELP_H
-#define CORTEX_MAKALU_ELP_H
+#ifndef CORTEX_MAKALU_ELP_ARM_H
+#define CORTEX_MAKALU_ELP_ARM_H
-#define CORTEX_MAKALU_ELP_MIDR U(0x410FD4E0)
+#define CORTEX_MAKALU_ELP_ARM_MIDR U(0x410FD4E0)
/*******************************************************************************
* CPU Extended Control register specific definitions
******************************************************************************/
-#define CORTEX_MAKALU_ELP_CPUECTLR_EL1 S3_0_C15_C1_4
+#define CORTEX_MAKALU_ELP_ARM_CPUECTLR_EL1 S3_0_C15_C1_4
/*******************************************************************************
* CPU Power Control register specific definitions
******************************************************************************/
-#define CORTEX_MAKALU_ELP_CPUPWRCTLR_EL1 S3_0_C15_C2_7
-#define CORTEX_MAKALU_ELP_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1)
+#define CORTEX_MAKALU_ELP_ARM_CPUPWRCTLR_EL1 S3_0_C15_C2_7
+#define CORTEX_MAKALU_ELP_ARM_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1)
-#endif /* CORTEX_MAKALU_ELP_H */
+#endif /* CORTEX_MAKALU_ELP_ARM_H */