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authorUsama Arif <usama.arif@arm.com>2018-12-12 17:14:29 +0000
committerUsama Arif <usama.arif@arm.com>2019-02-19 17:07:48 +0000
commit8f73663b5963ff10ec946b1faa92b4311f28cbd9 (patch)
treea0c9a47b834e819f84e1d27d6a590eb1f4f39b86 /include
parenta5aa25af6514ff04721efce05e46b4daf8729a85 (diff)
downloadtrusted-firmware-a-8f73663b5963ff10ec946b1faa92b4311f28cbd9.tar.gz
plat/arm: Support for Cortex A5 in FVP Versatile Express platform
Cortex A5 doesnt support VFP, Large Page addressing and generic timer which are addressed in this patch. The device tree for Cortex a5 is also included. Change-Id: I0722345721b145dfcc80bebd36a1afbdc44bb678 Signed-off-by: Usama Arif <usama.arif@arm.com>
Diffstat (limited to 'include')
-rw-r--r--include/arch/aarch32/el3_common_macros.S2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/arch/aarch32/el3_common_macros.S b/include/arch/aarch32/el3_common_macros.S
index 048f16103e..4af76249fb 100644
--- a/include/arch/aarch32/el3_common_macros.S
+++ b/include/arch/aarch32/el3_common_macros.S
@@ -94,9 +94,11 @@
* from all exception levels.
* ---------------------------------------------------------------------
*/
+#if (ARM_ARCH_MAJOR > 7) || defined(ARMV7_SUPPORTS_VFP)
ldr r0, =(FPEXC_RESET_VAL | FPEXC_EN_BIT)
vmsr FPEXC, r0
isb
+#endif
#if (ARM_ARCH_MAJOR > 7)
/* ---------------------------------------------------------------------