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authorKonstantin Porotchkin <kostap@marvell.com>2019-03-25 15:35:41 +0200
committerMarcin Wojtas <mw@semihalf.com>2020-06-19 17:59:43 +0200
commit772aa5ba75f38930e8e9c3f370a4e2aa9f5f417c (patch)
tree2e953838c50fd4e609342bb0f0e0bc8ae431b81b /include
parente825176f1c499c6bedfe7eb887350a5e2ccbe239 (diff)
downloadtrusted-firmware-a-772aa5ba75f38930e8e9c3f370a4e2aa9f5f417c.tar.gz
drivers: marvell: align and extend llc macros
Make all LLC-related macros to start with the same prefix Add more LLC control registers definitions This patch is a preparation step for LLC SRAM support Change-Id: I0a4f0fc83e8ef35be93dd239a85f2a9f88d1ab19 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Diffstat (limited to 'include')
-rw-r--r--include/drivers/marvell/cache_llc.h19
1 files changed, 14 insertions, 5 deletions
diff --git a/include/drivers/marvell/cache_llc.h b/include/drivers/marvell/cache_llc.h
index 85babb8d4b..d8eca9fbf3 100644
--- a/include/drivers/marvell/cache_llc.h
+++ b/include/drivers/marvell/cache_llc.h
@@ -14,18 +14,27 @@
#define LLC_CTRL(ap) (MVEBU_LLC_BASE(ap) + 0x100)
#define LLC_SYNC(ap) (MVEBU_LLC_BASE(ap) + 0x700)
-#define L2X0_INV_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x77C)
-#define L2X0_CLEAN_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x7BC)
-#define L2X0_CLEAN_INV_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x7FC)
+#define LLC_BANKED_MNT_AHR(ap) (MVEBU_LLC_BASE(ap) + 0x724)
+#define LLC_INV_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x77C)
+#define LLC_BLK_ALOC(ap) (MVEBU_LLC_BASE(ap) + 0x78c)
+#define LLC_CLEAN_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x7BC)
+#define LLC_CLEAN_INV_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x7FC)
#define LLC_TC0_LOCK(ap) (MVEBU_LLC_BASE(ap) + 0x920)
#define MASTER_LLC_CTRL LLC_CTRL(MVEBU_AP0)
-#define MASTER_L2X0_INV_WAY L2X0_INV_WAY(MVEBU_AP0)
+#define MASTER_LLC_INV_WAY LLC_INV_WAY(MVEBU_AP0)
#define MASTER_LLC_TC0_LOCK LLC_TC0_LOCK(MVEBU_AP0)
#define LLC_CTRL_EN 1
#define LLC_EXCLUSIVE_EN 0x100
-#define LLC_WAY_MASK 0xFFFFFFFF
+#define LLC_ALL_WAYS_MASK 0xFFFFFFFF
+
+/* AP806/AP807 - 1MB 8-ways LLC */
+#define LLC_WAYS 8
+#define LLC_WAY_MASK ((1 << LLC_WAYS) - 1)
+#define LLC_SIZE (1024 * 1024)
+#define LLC_WAY_SIZE (LLC_SIZE / LLC_WAYS)
+
#ifndef __ASSEMBLER__
void llc_cache_sync(int ap_index);