aboutsummaryrefslogtreecommitdiff
path: root/include
diff options
context:
space:
mode:
authorYann Gautier <yann.gautier@st.com>2020-11-06 15:32:25 +0100
committerYann Gautier <yann.gautier@foss.st.com>2021-03-08 18:15:26 +0100
commit4f81ed8e1a9398b032ae7a8c979b9ebb76406a2a (patch)
treebe463e9767e1b197d269a579b47a77be676c395d /include
parent2c62b00e8c4b327165a4bfd874714aa460f3e176 (diff)
downloadtrusted-firmware-a-4f81ed8e1a9398b032ae7a8c979b9ebb76406a2a.tar.gz
tzc400: correct FAIL_CONTROL Privileged bit
When bit 20 of TZC400 Fail control register [1] is set to 1, it means Privileged access, the macros FAIL_CONTROL_PRIV_PRIV and FAIL_CONTROL_PRIV_UNPRIV are then updated to reflect this. [1] https://developer.arm.com/documentation/ddi0504/c/programmers-model/register-descriptions/fail-control-register?lang=en Change-Id: I01e522fded5cf66c9827293ddcf543c79f9e509e Signed-off-by: Yann Gautier <yann.gautier@st.com>
Diffstat (limited to 'include')
-rw-r--r--include/drivers/arm/tzc400.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/drivers/arm/tzc400.h b/include/drivers/arm/tzc400.h
index cf2e82bc55..aacd5dfea3 100644
--- a/include/drivers/arm/tzc400.h
+++ b/include/drivers/arm/tzc400.h
@@ -65,8 +65,8 @@
#define FAIL_CONTROL_NS_SECURE U(0)
#define FAIL_CONTROL_NS_NONSECURE U(1)
#define FAIL_CONTROL_PRIV_SHIFT 20
-#define FAIL_CONTROL_PRIV_PRIV U(0)
-#define FAIL_CONTROL_PRIV_UNPRIV U(1)
+#define FAIL_CONTROL_PRIV_UNPRIV U(0)
+#define FAIL_CONTROL_PRIV_PRIV U(1)
/*
* FAIL_ID_ID_MASK depends on AID_WIDTH which is platform specific.