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authorBipin Ravi <bipin.ravi@arm.com>2021-03-16 15:20:58 -0500
committerBipin Ravi <bipin.ravi@arm.com>2021-03-31 16:02:35 -0500
commit0a144dd4ea1ab292d0fe5b14d0420063bd0936f5 (patch)
treeb94d3d592118e44facc9c9130fd169b769c9ddca /include
parent8078b5c5a0c2a47710df96412d88df53486e2b29 (diff)
downloadtrusted-firmware-a-0a144dd4ea1ab292d0fe5b14d0420063bd0936f5.tar.gz
Add Cortex_A78C CPU lib
Add basic support for Cortex_A78C CPU. Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: Id9e41cbe0580a68c6412d194a5ee67940e8dae56
Diffstat (limited to 'include')
-rw-r--r--include/lib/cpus/aarch64/cortex_a78c.h24
1 files changed, 24 insertions, 0 deletions
diff --git a/include/lib/cpus/aarch64/cortex_a78c.h b/include/lib/cpus/aarch64/cortex_a78c.h
new file mode 100644
index 0000000000..adb13bc92e
--- /dev/null
+++ b/include/lib/cpus/aarch64/cortex_a78c.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2021, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef CORTEX_A78C_H
+#define CORTEX_A78C_H
+
+
+#define CORTEX_A78C_MIDR U(0x410FD4B1)
+
+/*******************************************************************************
+ * CPU Extended Control register specific definitions.
+ ******************************************************************************/
+#define CORTEX_A78C_CPUECTLR_EL1 S3_0_C15_C1_4
+
+/*******************************************************************************
+ * CPU Power Control register specific definitions
+ ******************************************************************************/
+#define CORTEX_A78C_CPUPWRCTLR_EL1 S3_0_C15_C2_7
+#define CORTEX_A78C_CPUPWRCTLR_EL1_CORE_PWRDN_EN_BIT U(1)
+
+#endif /* CORTEX_A78C_H */