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authorAlex Leibovich <alexl@marvell.com>2019-02-10 15:08:25 +0200
committerMarcin Wojtas <mw@semihalf.com>2020-06-07 00:06:03 +0200
commit85d2ed150158e4c92f3238342a76dea4c30d7a95 (patch)
tree28e2180ef9893076ea1666bafde10ac9296db778 /include/drivers
parent57adbf37e6177eab79277ce5406a9bbde930ee3c (diff)
downloadtrusted-firmware-a-85d2ed150158e4c92f3238342a76dea4c30d7a95.tar.gz
ble: ap807: clean-up PLL configuration sequence
Remove pll powerdown from pll configuration sequence to improve stability. Remove redundant cases, which no longer exist. Also get rid of irrelevant definition of CPU_2200_DDR_1200_RCLK_1200, which is not used by 806/807. Change-Id: If911e7dee003dfb9a42fafd7ffe34662f026fd23 Signed-off-by: Alex Leibovich <alexl@marvell.com>
Diffstat (limited to 'include/drivers')
-rw-r--r--include/drivers/marvell/aro.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/include/drivers/marvell/aro.h b/include/drivers/marvell/aro.h
index c9dd36e4f8..4d1094a65a 100644
--- a/include/drivers/marvell/aro.h
+++ b/include/drivers/marvell/aro.h
@@ -27,11 +27,7 @@ enum cpu_clock_freq_mode {
CPU_2000_DDR_1200_RCLK_1200 = 0x0,
CPU_2000_DDR_1050_RCLK_1050 = 0x1,
CPU_1600_DDR_800_RCLK_800 = 0x4,
-#ifdef MVEBU_SOC_AP807
CPU_2200_DDR_1200_RCLK_1200 = 0x6,
-#else
- CPU_1800_DDR_1200_RCLK_1200 = 0x6,
-#endif
CPU_1800_DDR_1050_RCLK_1050 = 0x7,
CPU_1600_DDR_900_RCLK_900 = 0x0B,
CPU_1600_DDR_1050_RCLK_1050 = 0x0D,