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author | Alexei Fedorov <Alexei.Fedorov@arm.com> | 2020-04-06 19:00:35 +0100 |
---|---|---|
committer | Alexei Fedorov <Alexei.Fedorov@arm.com> | 2020-04-07 11:17:58 +0100 |
commit | 5875f2665d7efd7fe3e71e53a7c83dafc9717315 (patch) | |
tree | 3627e2538bedf776fef045e3342a9194d48735c1 /include/drivers | |
parent | 8f3ad7661400c1cf23276f8ffff905102c54329a (diff) | |
download | trusted-firmware-a-5875f2665d7efd7fe3e71e53a7c83dafc9717315.tar.gz |
TF-A: Add GICv4 extension for GIC driver
This patch adds support for GICv4 extension.
New `GIC_ENABLE_V4_EXTN` option passed to gicv3.mk makefile
was added, and enables GICv4 related changes when set to 1.
This option defaults to 0.
Change-Id: I30ebe1b7a98d3a54863900f37eda4589c707a288
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Diffstat (limited to 'include/drivers')
-rw-r--r-- | include/drivers/arm/gic_common.h | 16 | ||||
-rw-r--r-- | include/drivers/arm/gicv3.h | 6 |
2 files changed, 12 insertions, 10 deletions
diff --git a/include/drivers/arm/gic_common.h b/include/drivers/arm/gic_common.h index 3ac1b43fff..dc23721bbb 100644 --- a/include/drivers/arm/gic_common.h +++ b/include/drivers/arm/gic_common.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -40,7 +40,7 @@ #define GIC_HIGHEST_NS_PRIORITY U(0x80) /******************************************************************************* - * GIC Distributor interface register offsets that are common to GICv3 & GICv2 + * Common GIC Distributor interface register offsets ******************************************************************************/ #define GICD_CTLR U(0x0) #define GICD_TYPER U(0x4) @@ -61,19 +61,17 @@ #define CTLR_ENABLE_G0_MASK U(0x1) #define CTLR_ENABLE_G0_BIT BIT_32(CTLR_ENABLE_G0_SHIFT) - /******************************************************************************* - * GIC Distributor interface register constants that are common to GICv3 & GICv2 + * Common GIC Distributor interface register constants ******************************************************************************/ #define PIDR2_ARCH_REV_SHIFT 4 #define PIDR2_ARCH_REV_MASK U(0xf) -/* GICv3 revision as reported by the PIDR2 register */ -#define ARCH_REV_GICV3 U(0x3) -/* GICv2 revision as reported by the PIDR2 register */ -#define ARCH_REV_GICV2 U(0x2) -/* GICv1 revision as reported by the PIDR2 register */ +/* GIC revision as reported by PIDR2.ArchRev register field */ #define ARCH_REV_GICV1 U(0x1) +#define ARCH_REV_GICV2 U(0x2) +#define ARCH_REV_GICV3 U(0x3) +#define ARCH_REV_GICV4 U(0x4) #define IGROUPR_SHIFT 5 #define ISENABLER_SHIFT 5 diff --git a/include/drivers/arm/gicv3.h b/include/drivers/arm/gicv3.h index c29896b4b5..03596b96ec 100644 --- a/include/drivers/arm/gicv3.h +++ b/include/drivers/arm/gicv3.h @@ -151,9 +151,13 @@ #define TYPER_ESPI_RANGE U(TYPER_ESPI_MASK << TYPER_ESPI_SHIFT) /******************************************************************************* - * GICv3 and 3.1 Redistributor interface registers & constants + * Common GIC Redistributor interface registers & constants ******************************************************************************/ +#if GIC_ENABLE_V4_EXTN +#define GICR_PCPUBASE_SHIFT 0x12 +#else #define GICR_PCPUBASE_SHIFT 0x11 +#endif #define GICR_SGIBASE_OFFSET U(65536) /* 64 KB */ #define GICR_CTLR U(0x0) #define GICR_IIDR U(0x04) |