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authorPali Rohár <pali@kernel.org>2021-01-18 12:52:55 +0100
committerPali Rohár <pali@kernel.org>2021-01-18 12:52:55 +0100
commitb8e637f49ea90d06b21f160eba3180717787730f (patch)
treeb33ce8874631dff31e4d2bbe3d746d218bd556a5 /include/drivers/marvell/uart/a3700_console.h
parent74867756ef5c8f2a33af2fc59915cbd8905a23e5 (diff)
downloadtrusted-firmware-a-b8e637f49ea90d06b21f160eba3180717787730f.tar.gz
marvell: uart: a3720: Fix macro name for 6th bit of Status Register
This patch does not change code, it only updates comments and macro name for 6th bit of Status Register. So TF-A binary stay same. 6th bit of the Status Register is named TX EMPTY and is set to 1 when both Transmitter Holding Register (THR) or Transmitter Shift Register (TSR) are empty. It is when all characters were already transmitted. There is also TX FIFO EMPTY bit in the Status Register which is set to 1 only when THR is empty. In both console_a3700_core_init() and console_a3700_core_flush() functions we should wait until both THR and TSR are empty therefore we should check 6th bit of the Status Register. So current code is correct, just had misleading macro names and comments. This change fixes this "documentation" issue, fixes macro name for 6th bit of the Status Register and also updates comments. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I19e4e7f53a90bcfb318e6dd1b1249b6cbf81c4d3
Diffstat (limited to 'include/drivers/marvell/uart/a3700_console.h')
-rw-r--r--include/drivers/marvell/uart/a3700_console.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/drivers/marvell/uart/a3700_console.h b/include/drivers/marvell/uart/a3700_console.h
index e77a165608..12d2cdc523 100644
--- a/include/drivers/marvell/uart/a3700_console.h
+++ b/include/drivers/marvell/uart/a3700_console.h
@@ -48,12 +48,12 @@
/* Line Status Register bits */
#define UARTLSR_TXFIFOFULL (1 << 11) /* Tx Fifo Full */
+#define UARTLSR_TXEMPTY (1 << 6) /* Tx Empty */
#define UARTLSR_RXRDY (1 << 4) /* Rx Ready */
/* UART Control Register bits */
#define UART_CTRL_RXFIFO_RESET (1 << 14)
#define UART_CTRL_TXFIFO_RESET (1 << 15)
-#define UARTLSR_TXFIFOEMPTY (1 << 6)
#ifndef __ASSEMBLER__