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authorVishnu Banavath <vishnu.banavath@arm.com>2019-12-13 17:18:15 +0000
committervishnu.banavath <vishnu.banavath@arm.com>2020-01-03 10:44:28 +0000
commitc20c05252c755ed0805f38f93201c4d582af0516 (patch)
tree5fad83501452fbc91e3348aebf34d5ba3706de2d /include/drivers/arm
parent8a0a8199e894674ea4aaf8ecb807aea1b7e651d0 (diff)
downloadtrusted-firmware-a-c20c05252c755ed0805f38f93201c4d582af0516.tar.gz
drivers: add a driver for snoop control unit
The SCU connects one to four Cortex-A5/Cortex-A9 processors to the memory system through the AXI interfaces. The SCU functions are to: - maintain data cache coherency between the Cortex-A5/Cortex-A9 processors - initiate L2 AXI memory accesses - arbitrate between Cortex-A5/Cortex-A9 processors requesting L2 accesses - manage ACP accesses. Snoop Control Unit will enable to snoop on other CPUs caches. This is very important when it comes to synchronizing data between CPUs. As an example, there is a high chance that data might be cache'd and other CPUs can't see the change. In such cases, if snoop control unit is enabled, data is synchoronized immediately between CPUs and the changes are visible to other CPUs. This driver provides functionality to enable SCU as well as enabling user to know the following - number of CPUs present - is a particular CPU operating in SMP mode or AMP mode - data cache size of a particular CPU - does SCU has ACP port - is L2CPRESENT Change-Id: I0d977970154fa60df57caf449200d471f02312a0 Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
Diffstat (limited to 'include/drivers/arm')
-rw-r--r--include/drivers/arm/scu.h20
1 files changed, 20 insertions, 0 deletions
diff --git a/include/drivers/arm/scu.h b/include/drivers/arm/scu.h
new file mode 100644
index 0000000000..992539f218
--- /dev/null
+++ b/include/drivers/arm/scu.h
@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2019, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef SCU_H
+#define SCU_H
+
+#include <stdint.h>
+
+#define SCU_CTRL_REG 0x00
+#define SCU_CFG_REG 0x04
+
+#define SCU_ENABLE_BIT (1 << 0)
+
+void enable_snoop_ctrl_unit(uintptr_t base);
+uint32_t read_snoop_ctrl_unit_cfg(uintptr_t base);
+
+#endif /* SCU_H */