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authorAntonio Nino Diaz <antonio.ninodiaz@arm.com>2019-01-23 21:50:09 +0000
committerAntonio Nino Diaz <antonio.ninodiaz@arm.com>2019-01-25 16:04:11 +0000
commit560293bb6f92fa4bbebea13113bac56ab50b7905 (patch)
treea0084ea079450933cca7c0e2760df6c5f3e66acf /include/drivers/arm
parent5932d194d7de355616de46adea8248224190b63e (diff)
downloadtrusted-firmware-a-560293bb6f92fa4bbebea13113bac56ab50b7905.tar.gz
fvp: pwrc: Move to drivers/ folder
Change-Id: I670ea80e0331c2d4b2ccfa563a45469a43f6902d Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Diffstat (limited to 'include/drivers/arm')
-rw-r--r--include/drivers/arm/fvp/fvp_pwrc.h55
1 files changed, 55 insertions, 0 deletions
diff --git a/include/drivers/arm/fvp/fvp_pwrc.h b/include/drivers/arm/fvp/fvp_pwrc.h
new file mode 100644
index 0000000000..ca173f36f8
--- /dev/null
+++ b/include/drivers/arm/fvp/fvp_pwrc.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef FVP_PWRC_H
+#define FVP_PWRC_H
+
+/* FVP Power controller register offset etc */
+#define PPOFFR_OFF U(0x0)
+#define PPONR_OFF U(0x4)
+#define PCOFFR_OFF U(0x8)
+#define PWKUPR_OFF U(0xc)
+#define PSYSR_OFF U(0x10)
+
+#define PWKUPR_WEN BIT_32(31)
+
+#define PSYSR_AFF_L2 BIT_32(31)
+#define PSYSR_AFF_L1 BIT_32(30)
+#define PSYSR_AFF_L0 BIT_32(29)
+#define PSYSR_WEN BIT_32(28)
+#define PSYSR_PC BIT_32(27)
+#define PSYSR_PP BIT_32(26)
+
+#define PSYSR_WK_SHIFT 24
+#define PSYSR_WK_WIDTH 0x2
+#define PSYSR_WK_MASK ((1U << PSYSR_WK_WIDTH) - 1U)
+#define PSYSR_WK(x) ((x) >> PSYSR_WK_SHIFT) & PSYSR_WK_MASK
+
+#define WKUP_COLD U(0x0)
+#define WKUP_RESET U(0x1)
+#define WKUP_PPONR U(0x2)
+#define WKUP_GICREQ U(0x3)
+
+#define PSYSR_INVALID U(0xffffffff)
+
+#ifndef __ASSEMBLY__
+
+#include <stdint.h>
+
+/*******************************************************************************
+ * Function & variable prototypes
+ ******************************************************************************/
+void fvp_pwrc_write_pcoffr(u_register_t mpidr);
+void fvp_pwrc_write_ppoffr(u_register_t mpidr);
+void fvp_pwrc_write_pponr(u_register_t mpidr);
+void fvp_pwrc_set_wen(u_register_t mpidr);
+void fvp_pwrc_clr_wen(u_register_t mpidr);
+unsigned int fvp_pwrc_read_psysr(u_register_t mpidr);
+unsigned int fvp_pwrc_get_cpu_wkr(u_register_t mpidr);
+
+#endif /*__ASSEMBLY__*/
+
+#endif /* FVP_PWRC_H */