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authorMadhukar Pappireddy <madhukar.pappireddy@arm.com>2021-02-22 21:44:01 +0000
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2021-02-22 21:44:01 +0000
commit1272391ee13a5b3428fd7aa2dc88575492a15aec (patch)
tree3b2de4f1b68dfdb4750ab442a607455fd2f8fcb8 /include/drivers/arm/tzc400.h
parentc36e2d488e940c674a0f442d89f64bd4a57e7616 (diff)
parentd4c61c38783dd8d43ca6a63ce5fbc64c9c812db9 (diff)
downloadtrusted-firmware-a-1272391ee13a5b3428fd7aa2dc88575492a15aec.tar.gz
Merge changes Ie5c48303,I5d363c46 into integration
* changes: tzc400: adjust filter flag if it is set to FILTER_BIT_ALL tzc400: fix logical error in FILTER_BIT definitions
Diffstat (limited to 'include/drivers/arm/tzc400.h')
-rw-r--r--include/drivers/arm/tzc400.h9
1 files changed, 3 insertions, 6 deletions
diff --git a/include/drivers/arm/tzc400.h b/include/drivers/arm/tzc400.h
index 32aeb03502..cf2e82bc55 100644
--- a/include/drivers/arm/tzc400.h
+++ b/include/drivers/arm/tzc400.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2014-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -80,11 +80,8 @@
/* Filter enable bits in a TZC */
#define TZC_400_REGION_ATTR_F_EN_MASK U(0xf)
-#define TZC_400_REGION_ATTR_FILTER_BIT(x) \
- ((U(1) << (x)) << TZC_REGION_ATTR_F_EN_SHIFT)
-#define TZC_400_REGION_ATTR_FILTER_BIT_ALL \
- (TZC_400_REGION_ATTR_F_EN_MASK << \
- TZC_REGION_ATTR_F_EN_SHIFT)
+#define TZC_400_REGION_ATTR_FILTER_BIT(x) (U(1) << (x))
+#define TZC_400_REGION_ATTR_FILTER_BIT_ALL TZC_400_REGION_ATTR_F_EN_MASK
/*
* All TZC region configuration registers are placed one after another. It