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author | Varun Wadekar <vwadekar@nvidia.com> | 2017-05-25 18:04:48 -0700 |
---|---|---|
committer | Varun Wadekar <vwadekar@nvidia.com> | 2017-06-14 17:00:30 -0700 |
commit | 030567e6f51731982a7e71cbd387de93bc0e35fd (patch) | |
tree | f5684ca0177c7cd52dc1286ef612ffa66e72b539 /include/bl31 | |
parent | 6176b4fcb4175a25d918345a729cce560b9356c2 (diff) | |
download | trusted-firmware-a-030567e6f51731982a7e71cbd387de93bc0e35fd.tar.gz |
include: add U()/ULL() macros for constants
This patch uses the U() and ULL() macros for constants, to fix some
of the signed-ness defects flagged by the MISRA scanner.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'include/bl31')
-rw-r--r-- | include/bl31/interrupt_mgmt.h | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/include/bl31/interrupt_mgmt.h b/include/bl31/interrupt_mgmt.h index e0bf2db07b..9a6a7faa7a 100644 --- a/include/bl31/interrupt_mgmt.h +++ b/include/bl31/interrupt_mgmt.h @@ -12,16 +12,16 @@ /******************************************************************************* * Constants for the types of interrupts recognised by the IM framework ******************************************************************************/ -#define INTR_TYPE_S_EL1 0 -#define INTR_TYPE_EL3 1 -#define INTR_TYPE_NS 2 -#define MAX_INTR_TYPES 3 +#define INTR_TYPE_S_EL1 U(0) +#define INTR_TYPE_EL3 U(1) +#define INTR_TYPE_NS U(2) +#define MAX_INTR_TYPES U(3) #define INTR_TYPE_INVAL MAX_INTR_TYPES /* * Constant passed to the interrupt handler in the 'id' field when the * framework does not read the gic registers to determine the interrupt id. */ -#define INTR_ID_UNAVAILABLE 0xFFFFFFFF +#define INTR_ID_UNAVAILABLE U(0xFFFFFFFF) /******************************************************************************* @@ -29,37 +29,37 @@ * constants to define the valid routing models for each supported interrupt * type ******************************************************************************/ -#define INTR_RM_FLAGS_SHIFT 0x0 -#define INTR_RM_FLAGS_MASK 0x3 +#define INTR_RM_FLAGS_SHIFT U(0x0) +#define INTR_RM_FLAGS_MASK U(0x3) /* Routed to EL3 from NS. Taken to S-EL1 from Secure */ -#define INTR_SEL1_VALID_RM0 0x2 +#define INTR_SEL1_VALID_RM0 U(0x2) /* Routed to EL3 from NS and Secure */ -#define INTR_SEL1_VALID_RM1 0x3 +#define INTR_SEL1_VALID_RM1 U(0x3) /* Routed to EL1/EL2 from NS and to S-EL1 from Secure */ -#define INTR_NS_VALID_RM0 0x0 +#define INTR_NS_VALID_RM0 U(0x0) /* Routed to EL1/EL2 from NS and to EL3 from Secure */ -#define INTR_NS_VALID_RM1 0x1 +#define INTR_NS_VALID_RM1 U(0x1) /* Routed to EL3 from NS. Taken to S-EL1 from Secure and handed over to EL3 */ -#define INTR_EL3_VALID_RM0 0x2 +#define INTR_EL3_VALID_RM0 U(0x2) /* Routed to EL3 from NS and Secure */ -#define INTR_EL3_VALID_RM1 0x3 +#define INTR_EL3_VALID_RM1 U(0x3) /* This is the default routing model */ -#define INTR_DEFAULT_RM 0x0 +#define INTR_DEFAULT_RM U(0x0) /******************************************************************************* * Constants for the _individual_ routing model bits in the 'flags' field for * each interrupt type and mask to validate the 'flags' parameter while * registering an interrupt handler ******************************************************************************/ -#define INTR_TYPE_FLAGS_MASK 0xFFFFFFFC +#define INTR_TYPE_FLAGS_MASK U(0xFFFFFFFC) #define INTR_RM_FROM_SEC_SHIFT SECURE /* BIT[0] */ #define INTR_RM_FROM_NS_SHIFT NON_SECURE /* BIT[1] */ -#define INTR_RM_FROM_FLAG_MASK 1 +#define INTR_RM_FROM_FLAG_MASK U(1) #define get_interrupt_rm_flag(flag, ss) (((flag >> INTR_RM_FLAGS_SHIFT) >> ss) \ & INTR_RM_FROM_FLAG_MASK) -#define set_interrupt_rm_flag(flag, ss) (flag |= 1 << ss) -#define clr_interrupt_rm_flag(flag, ss) (flag &= ~(1 << ss)) +#define set_interrupt_rm_flag(flag, ss) (flag |= U(1) << ss) +#define clr_interrupt_rm_flag(flag, ss) (flag &= ~(U(1) << ss)) /******************************************************************************* @@ -84,10 +84,10 @@ * the flag to indicate the security state when the exception was generated is * supported. ******************************************************************************/ -#define INTR_SRC_SS_FLAG_SHIFT 0 /* BIT[0] */ -#define INTR_SRC_SS_FLAG_MASK 1 +#define INTR_SRC_SS_FLAG_SHIFT U(0) /* BIT[0] */ +#define INTR_SRC_SS_FLAG_MASK U(1) #define set_interrupt_src_ss(flag, val) (flag |= val << INTR_SRC_SS_FLAG_SHIFT) -#define clr_interrupt_src_ss(flag) (flag &= ~(1 << INTR_SRC_SS_FLAG_SHIFT)) +#define clr_interrupt_src_ss(flag) (flag &= ~(U(1) << INTR_SRC_SS_FLAG_SHIFT)) #define get_interrupt_src_ss(flag) ((flag >> INTR_SRC_SS_FLAG_SHIFT) & \ INTR_SRC_SS_FLAG_MASK) |