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author | Grzegorz Jaszczyk <jaz@semihalf.com> | 2019-11-05 13:14:59 +0100 |
---|---|---|
committer | Marcin Wojtas <mw@semihalf.com> | 2020-06-07 00:06:03 +0200 |
commit | a28471722afb3ae784d7bce2118c2ea703f8444c (patch) | |
tree | 60edc1ee925bc6645747b23d6621ed9a862a4e39 /drivers | |
parent | 967a6d162d9dc1c5ae154f289bcdecc03cb9eb7c (diff) | |
download | trusted-firmware-a-a28471722afb3ae784d7bce2118c2ea703f8444c.tar.gz |
marvell: armada: add extra level in marvell platform hierarchy
This commit is a preparation for upcoming support for OcteonTX and
OcteonTX2 product families. Armada platform related files (docs,
plat, include/plat) are moved to the new "armada" sub-folder.
Change-Id: Icf03356187078ad6a2e56c9870992be3ca4c9655
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/marvell/comphy/phy-comphy-cp110.c | 2 | ||||
-rw-r--r-- | drivers/marvell/comphy/phy-comphy-cp110.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/marvell/comphy/phy-comphy-cp110.c b/drivers/marvell/comphy/phy-comphy-cp110.c index 384dd39f23..b682086297 100644 --- a/drivers/marvell/comphy/phy-comphy-cp110.c +++ b/drivers/marvell/comphy/phy-comphy-cp110.c @@ -2236,7 +2236,7 @@ int mvebu_cp110_comphy_xfi_rx_training(uint64_t comphy_base, printf("########################################################\n"); printf("# To use trained values update the ATF sources:\n"); - printf("# plat/marvell/a8k/<board_type>/board/phy-porting-layer.h "); + printf("# plat/marvell/armada/a8k/<board_type>/board/phy-porting-layer.h "); printf("file\n# with new values as below (for appropriate AP nr %d", ap_nr); printf("and CP nr: %d comphy_index %d\n\n", diff --git a/drivers/marvell/comphy/phy-comphy-cp110.h b/drivers/marvell/comphy/phy-comphy-cp110.h index 407909bf7e..63aef12005 100644 --- a/drivers/marvell/comphy/phy-comphy-cp110.h +++ b/drivers/marvell/comphy/phy-comphy-cp110.h @@ -7,7 +7,7 @@ /* Those are parameters for xfi mode, which need to be tune for each board type. * For known DB boards the parameters was already calibrated and placed under - * the plat/marvell/a8k/<board_type>/board/phy-porting-layer.h + * the plat/marvell/armada/a8k/<board_type>/board/phy-porting-layer.h */ struct xfi_params { uint8_t g1_ffe_res_sel; |