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authorRoberto Vargas <roberto.vargas@arm.com>2018-02-12 12:36:17 +0000
committerRoberto Vargas <roberto.vargas@arm.com>2018-02-28 17:18:46 +0000
commit7fabe1a89903cab4919304faa085ee6eaaec5c9d (patch)
tree140db3931433edf3ac1724eef7db426614afa42a /drivers/arm
parent9fb8af33c40f21becde99fc15db73b1f4d82059c (diff)
downloadtrusted-firmware-a-7fabe1a89903cab4919304faa085ee6eaaec5c9d.tar.gz
Fix MISRA rule 8.4 in common code
Rule 8.4: A compatible declaration shall be visible when an object or function with external linkage is defined. Change-Id: I26e042cb251a6f9590afa1340fdac73e42f23979 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Diffstat (limited to 'drivers/arm')
-rw-r--r--drivers/arm/gic/common/gic_common_private.h8
-rw-r--r--drivers/arm/gic/v2/gicv2_helpers.c3
-rw-r--r--drivers/arm/gic/v2/gicv2_main.c4
3 files changed, 11 insertions, 4 deletions
diff --git a/drivers/arm/gic/common/gic_common_private.h b/drivers/arm/gic/common/gic_common_private.h
index 2021f9aae9..fa34e477c8 100644
--- a/drivers/arm/gic/common/gic_common_private.h
+++ b/drivers/arm/gic/common/gic_common_private.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -49,6 +49,9 @@ unsigned int gicd_read_icactiver(uintptr_t base, unsigned int id);
unsigned int gicd_read_ipriorityr(uintptr_t base, unsigned int id);
unsigned int gicd_read_icfgr(uintptr_t base, unsigned int id);
unsigned int gicd_read_nsacr(uintptr_t base, unsigned int id);
+unsigned int gicd_read_spendsgir(uintptr_t base, unsigned int id);
+unsigned int gicd_read_cpendsgir(uintptr_t base, unsigned int id);
+unsigned int gicd_read_itargetsr(uintptr_t base, unsigned int id);
void gicd_write_igroupr(uintptr_t base, unsigned int id, unsigned int val);
void gicd_write_isenabler(uintptr_t base, unsigned int id, unsigned int val);
void gicd_write_icenabler(uintptr_t base, unsigned int id, unsigned int val);
@@ -59,6 +62,9 @@ void gicd_write_icactiver(uintptr_t base, unsigned int id, unsigned int val);
void gicd_write_ipriorityr(uintptr_t base, unsigned int id, unsigned int val);
void gicd_write_icfgr(uintptr_t base, unsigned int id, unsigned int val);
void gicd_write_nsacr(uintptr_t base, unsigned int id, unsigned int val);
+void gicd_write_spendsgir(uintptr_t base, unsigned int id, unsigned int val);
+void gicd_write_cpendsgir(uintptr_t base, unsigned int id, unsigned int val);
+void gicd_write_itargetsr(uintptr_t base, unsigned int id, unsigned int val);
/*******************************************************************************
* GIC Distributor function prototypes for accessing the GIC registers
diff --git a/drivers/arm/gic/v2/gicv2_helpers.c b/drivers/arm/gic/v2/gicv2_helpers.c
index 0df50fb008..421669fc19 100644
--- a/drivers/arm/gic/v2/gicv2_helpers.c
+++ b/drivers/arm/gic/v2/gicv2_helpers.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -9,6 +9,7 @@
#include <assert.h>
#include <debug.h>
#include <gic_common.h>
+#include <gicv2.h>
#include <interrupt_props.h>
#include "../common/gic_common_private.h"
#include "gicv2_private.h"
diff --git a/drivers/arm/gic/v2/gicv2_main.c b/drivers/arm/gic/v2/gicv2_main.c
index 8798659471..c65f972d09 100644
--- a/drivers/arm/gic/v2/gicv2_main.c
+++ b/drivers/arm/gic/v2/gicv2_main.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -22,7 +22,7 @@ static const gicv2_driver_data_t *driver_data;
* spinlock are used either at boot time (when only a single CPU is active), or
* when the system is fully coherent.
*/
-spinlock_t gic_lock;
+static spinlock_t gic_lock;
/*******************************************************************************
* Enable secure interrupts and use FIQs to route them. Disable legacy bypass