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authorDerek Basehore <dbasehore@chromium.org>2018-01-23 15:49:17 -0800
committerDerek Basehore <dbasehore@chromium.org>2018-01-23 17:42:49 -0800
commit3580a497b52429f92f20451c3b05cb6fad507bbd (patch)
treefdeb6f35c0cdc413aaf5fde8ecf8ac9b53c69be6 /drivers/arm
parentaa9ee82dc1e0790886a0cee6e5c9681f0d324aac (diff)
downloadtrusted-firmware-a-3580a497b52429f92f20451c3b05cb6fad507bbd.tar.gz
GICv3: Fix Dist restore for when the GIC is reset
If the GIC loses power during suspend, which the restore code was written for, exit early in the post restore power sequence. This prevents an assert from tripping, and the power sequence isn't needed in this case anyways. Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Diffstat (limited to 'drivers/arm')
-rw-r--r--drivers/arm/gic/v3/arm_gicv3_common.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/arm/gic/v3/arm_gicv3_common.c b/drivers/arm/gic/v3/arm_gicv3_common.c
index 8d552ca5ee..c809732951 100644
--- a/drivers/arm/gic/v3/arm_gicv3_common.c
+++ b/drivers/arm/gic/v3/arm_gicv3_common.c
@@ -84,6 +84,15 @@ void arm_gicv3_distif_post_restore(unsigned int rdist_proc_num)
assert(gicr_base);
/*
+ * If the GIC had power removed, the GICR_WAKER state will be reset.
+ * Since the GICR_WAKER.Sleep and GICR_WAKER.Quiescent bits are cleared,
+ * we can exit early. This also prevents the following assert from
+ * erroneously triggering.
+ */
+ if (!(gicr_read_waker(gicr_base) & WAKER_SL_BIT))
+ return;
+
+ /*
* Writes to GICR_WAKER.Sleep bit are ignored if GICR_WAKER.Quiescent
* bit is not set. We should be alright on power on path, therefore
* coming out of sleep and Quiescent should be set, but we assert in