aboutsummaryrefslogtreecommitdiff
path: root/docs
diff options
context:
space:
mode:
authorSoby Mathew <soby.mathew@arm.com>2018-12-12 14:54:23 +0000
committerSoby Mathew <soby.mathew@arm.com>2018-12-17 15:25:49 +0000
commit8aa4e5f4eb02cb7fdc1789c52526a838176799c2 (patch)
treea1afef4375f5bada3a3feb86fb1a3d9efaa147f4 /docs
parent5bfac4fc2f95647e57cc4e9ca3aaa46662890743 (diff)
downloadtrusted-firmware-a-8aa4e5f4eb02cb7fdc1789c52526a838176799c2.tar.gz
docs: User-guide corrections for RESET_TO_BL31
This patch updates the user guide instructions for RESET_TO_SP_MIN and RESET_TO_BL31 cases. The load address for BL31 had to be updated because of increase in code size. Also, information about PIE support when RESET_TO_BL31=1 for FVP is added. In the case of RESET_TO_SP_MIN, the RVBAR address was wrong in the instruction. This is also corrected in the patch. Change-Id: I65fe6d28c5cf79bee0a11fbde320d49fcc1aacf5 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Diffstat (limited to 'docs')
-rw-r--r--docs/user-guide.rst67
1 files changed, 35 insertions, 32 deletions
diff --git a/docs/user-guide.rst b/docs/user-guide.rst
index a8bd40ce53..103f1c727d 100644
--- a/docs/user-guide.rst
+++ b/docs/user-guide.rst
@@ -1875,16 +1875,16 @@ with 8 CPUs using the AArch64 build of TF-A.
-C cluster0.NUM_CORES=4 \
-C cluster1.NUM_CORES=4 \
-C cache_state_modelled=1 \
- -C cluster0.cpu0.RVBAR=0x04020000 \
- -C cluster0.cpu1.RVBAR=0x04020000 \
- -C cluster0.cpu2.RVBAR=0x04020000 \
- -C cluster0.cpu3.RVBAR=0x04020000 \
- -C cluster1.cpu0.RVBAR=0x04020000 \
- -C cluster1.cpu1.RVBAR=0x04020000 \
- -C cluster1.cpu2.RVBAR=0x04020000 \
- -C cluster1.cpu3.RVBAR=0x04020000 \
- --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04020000 \
- --data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04001000 \
+ -C cluster0.cpu0.RVBAR=0x04010000 \
+ -C cluster0.cpu1.RVBAR=0x04010000 \
+ -C cluster0.cpu2.RVBAR=0x04010000 \
+ -C cluster0.cpu3.RVBAR=0x04010000 \
+ -C cluster1.cpu0.RVBAR=0x04010000 \
+ -C cluster1.cpu1.RVBAR=0x04010000 \
+ -C cluster1.cpu2.RVBAR=0x04010000 \
+ -C cluster1.cpu3.RVBAR=0x04010000 \
+ --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04010000 \
+ --data cluster0.cpu0="<path-to>/<bl32-binary>"@0xff000000 \
--data cluster0.cpu0="<path-to>/<bl33-binary>"@0x88000000 \
--data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
--data cluster0.cpu0="<path-to>/<kernel-binary>"@0x80080000 \
@@ -1892,6 +1892,9 @@ with 8 CPUs using the AArch64 build of TF-A.
Notes:
+- Since Position Independent Executable (PIE) support is enabled for BL31
+ in this config, it can be loaded at any valid address for execution.
+
- Since a FIP is not loaded when using BL31 as reset entrypoint, the
``--data="<path-to><bl31|bl32|bl33-binary>"@<base-address-of-binary>``
parameter is needed to load the individual bootloader images in memory.
@@ -1932,14 +1935,14 @@ with 8 CPUs using the AArch32 build of TF-A.
-C cluster1.cpu1.CONFIG64=0 \
-C cluster1.cpu2.CONFIG64=0 \
-C cluster1.cpu3.CONFIG64=0 \
- -C cluster0.cpu0.RVBAR=0x04001000 \
- -C cluster0.cpu1.RVBAR=0x04001000 \
- -C cluster0.cpu2.RVBAR=0x04001000 \
- -C cluster0.cpu3.RVBAR=0x04001000 \
- -C cluster1.cpu0.RVBAR=0x04001000 \
- -C cluster1.cpu1.RVBAR=0x04001000 \
- -C cluster1.cpu2.RVBAR=0x04001000 \
- -C cluster1.cpu3.RVBAR=0x04001000 \
+ -C cluster0.cpu0.RVBAR=0x04002000 \
+ -C cluster0.cpu1.RVBAR=0x04002000 \
+ -C cluster0.cpu2.RVBAR=0x04002000 \
+ -C cluster0.cpu3.RVBAR=0x04002000 \
+ -C cluster1.cpu0.RVBAR=0x04002000 \
+ -C cluster1.cpu1.RVBAR=0x04002000 \
+ -C cluster1.cpu2.RVBAR=0x04002000 \
+ -C cluster1.cpu3.RVBAR=0x04002000 \
--data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04002000 \
--data cluster0.cpu0="<path-to>/<bl33-binary>"@0x88000000 \
--data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
@@ -1962,16 +1965,16 @@ boot Linux with 8 CPUs using the AArch64 build of TF-A.
-C bp.secure_memory=1 \
-C bp.tzc_400.diagnostics=1 \
-C cache_state_modelled=1 \
- -C cluster0.cpu0.RVBARADDR=0x04020000 \
- -C cluster0.cpu1.RVBARADDR=0x04020000 \
- -C cluster0.cpu2.RVBARADDR=0x04020000 \
- -C cluster0.cpu3.RVBARADDR=0x04020000 \
- -C cluster1.cpu0.RVBARADDR=0x04020000 \
- -C cluster1.cpu1.RVBARADDR=0x04020000 \
- -C cluster1.cpu2.RVBARADDR=0x04020000 \
- -C cluster1.cpu3.RVBARADDR=0x04020000 \
- --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04020000 \
- --data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04002000 \
+ -C cluster0.cpu0.RVBARADDR=0x04010000 \
+ -C cluster0.cpu1.RVBARADDR=0x04010000 \
+ -C cluster0.cpu2.RVBARADDR=0x04010000 \
+ -C cluster0.cpu3.RVBARADDR=0x04010000 \
+ -C cluster1.cpu0.RVBARADDR=0x04010000 \
+ -C cluster1.cpu1.RVBARADDR=0x04010000 \
+ -C cluster1.cpu2.RVBARADDR=0x04010000 \
+ -C cluster1.cpu3.RVBARADDR=0x04010000 \
+ --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04010000 \
+ --data cluster0.cpu0="<path-to>/<bl32-binary>"@0xff000000 \
--data cluster0.cpu0="<path-to>/<bl33-binary>"@0x88000000 \
--data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
--data cluster0.cpu0="<path-to>/<kernel-binary>"@0x80080000 \
@@ -1990,10 +1993,10 @@ boot Linux with 4 CPUs using the AArch32 build of TF-A.
-C bp.secure_memory=1 \
-C bp.tzc_400.diagnostics=1 \
-C cache_state_modelled=1 \
- -C cluster0.cpu0.RVBARADDR=0x04001000 \
- -C cluster0.cpu1.RVBARADDR=0x04001000 \
- -C cluster0.cpu2.RVBARADDR=0x04001000 \
- -C cluster0.cpu3.RVBARADDR=0x04001000 \
+ -C cluster0.cpu0.RVBARADDR=0x04002000 \
+ -C cluster0.cpu1.RVBARADDR=0x04002000 \
+ -C cluster0.cpu2.RVBARADDR=0x04002000 \
+ -C cluster0.cpu3.RVBARADDR=0x04002000 \
--data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04002000 \
--data cluster0.cpu0="<path-to>/<bl33-binary>"@0x88000000 \
--data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \