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authorManish Pandey <manish.pandey2@arm.com>2020-06-16 09:55:36 +0000
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2020-06-16 09:55:36 +0000
commit5eeb091ade2f6a51f2e34aa9e62830afdc032aa1 (patch)
tree002cf914ba8e28f4926a3cea58d1322931e12bb1 /docs
parent83d1e8e75b45fe70d30b0c41edb006875ed0c6fa (diff)
parentfba5cdc69569a5b62cbd4303b91bb2d41d335566 (diff)
downloadtrusted-firmware-a-5eeb091ade2f6a51f2e34aa9e62830afdc032aa1.tar.gz
Merge changes from topic "tegra194-ras-handling" into integration
* changes: Tegra194: ras: verbose prints for SErrors Prevent RAS register access from lower ELs Tegra194: SiP: clear RAS corrected error records Tegra194: add RAS exception handling
Diffstat (limited to 'docs')
-rw-r--r--docs/components/ras.rst3
-rw-r--r--docs/getting_started/build-options.rst4
2 files changed, 6 insertions, 1 deletions
diff --git a/docs/components/ras.rst b/docs/components/ras.rst
index 3d81f17e9c..86529d740b 100644
--- a/docs/components/ras.rst
+++ b/docs/components/ras.rst
@@ -32,7 +32,8 @@ introduced by the RAS extensions.
The build option ``RAS_EXTENSION`` when set to ``1`` includes the RAS in run
time firmware; ``EL3_EXCEPTION_HANDLING`` and ``HANDLE_EA_EL3_FIRST`` must also
-be set ``1``.
+be set ``1``. ``RAS_TRAP_LOWER_EL_ERR_ACCESS`` controls the access to the RAS
+error record registers from lower ELs.
.. _ras-figure:
diff --git a/docs/getting_started/build-options.rst b/docs/getting_started/build-options.rst
index 920f934af4..f207886fb5 100644
--- a/docs/getting_started/build-options.rst
+++ b/docs/getting_started/build-options.rst
@@ -707,6 +707,10 @@ Common build options
| 1530924 | Cortex-A53 |
+---------+--------------+
+- ``RAS_TRAP_LOWER_EL_ERR_ACCESS``: This flag enables/disables the SCR_EL3.TERR
+ bit, to trap access to the RAS ERR and RAS ERX registers from lower ELs.
+ This flag is disabled by default.
+
GICv3 driver options
--------------------