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authorjohpow01 <john.powell@arm.com>2020-08-05 12:27:12 -0500
committerjohpow01 <john.powell@arm.com>2020-09-10 12:32:09 -0500
commit61f0ffc40abf477bbaa2aaa0e3adee504c288c38 (patch)
treec5a900bba53b4947a820fbb86a0af12cb4211e65 /docs
parented39d5e3c0709bab22821a1da3a62737c5d531de (diff)
downloadtrusted-firmware-a-61f0ffc40abf477bbaa2aaa0e3adee504c288c38.tar.gz
Workaround for Neoverse N1 erratum 1868343
Neoverse N1 erratum 1868343 is a Cat B erratum, present in older revisions of the Neoverse N1 processor core. The workaround is to set a bit in the CPUACTLR_EL1 system register, which delays instruction fetch after branch misprediction. This workaround will have a small impact on performance. SDEN can be found here: https://documentation-service.arm.com/static/5f2c130260a93e65927bc92f Signed-off-by: John Powell <john.powell@arm.com> Change-Id: I37da2b3b2da697701b883bff9a1eff2772352844
Diffstat (limited to 'docs')
-rw-r--r--docs/design/cpu-specific-build-macros.rst3
1 files changed, 3 insertions, 0 deletions
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst
index 33b509083d..3c0e30f79b 100644
--- a/docs/design/cpu-specific-build-macros.rst
+++ b/docs/design/cpu-specific-build-macros.rst
@@ -294,6 +294,9 @@ For Neoverse N1, the following errata build flags are defined :
- ``ERRATA_N1_1542419``: This applies errata 1542419 workaround to Neoverse-N1
CPU. This needs to be enabled only for revisions r3p0 - r4p0 of the CPU.
+- ``ERRATA_N1_1868343``: This applies errata 1868343 workaround to Neoverse-N1
+ CPU. This needs to be enabled only for revision <= r4p0 of the CPU.
+
DSU Errata Workarounds
----------------------