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author | johpow01 <john.powell@arm.com> | 2020-09-29 17:19:09 -0500 |
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committer | Alexei Fedorov <Alexei.Fedorov@arm.com> | 2020-10-03 12:58:53 +0000 |
commit | 55ff05f384aa8e150f192f618e807bab3e1ea12b (patch) | |
tree | 289f9734fa68d7cb2feaccde656a3b32477e9825 /docs | |
parent | 950e37d86ce74563df51056a2ec9606258866202 (diff) | |
download | trusted-firmware-a-55ff05f384aa8e150f192f618e807bab3e1ea12b.tar.gz |
Workaround for Cortex A76 erratum 1868343
Cortex A76 erratum 1868343 is a Cat B erratum, present in older
revisions of the Cortex A76 processor core. The workaround is to
set a bit in the CPUACTLR_EL1 system register, which delays instruction
fetch after branch misprediction. This workaround will have a small
impact on performance.
This workaround is the same as workarounds for errata 1262606 and
1275112, so all 3 have been combined into one function call.
SDEN can be found here:
https://documentation-service.arm.com/static/5f2bed6d60a93e65927bc8e7
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I7f2f9965f495540a1f84bb7dcc28aff45d6cee5d
Diffstat (limited to 'docs')
-rw-r--r-- | docs/design/cpu-specific-build-macros.rst | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index e9ff17e8c1..8152c00d58 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -249,6 +249,9 @@ For Cortex-A76, the following errata build flags are defined : limitation of errata framework this errata is applied to all revisions of Cortex-A76 CPU. +- ``ERRATA_A76_1868343``: This applies errata 1868343 workaround to Cortex-A76 + CPU. This needs to be enabled only for revision <= r4p0 of the CPU. + For Cortex-A77, the following errata build flags are defined : - ``ERRATA_A77_1508412``: This applies errata 1508412 workaround to Cortex-A77 |