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authorSandrine Bailleux <sandrine.bailleux@arm.com>2018-01-29 14:48:15 +0100
committerSandrine Bailleux <sandrine.bailleux@arm.com>2018-01-29 14:49:56 +0100
commit7c0a843fa2b6c047974676cd5175351b5db53c1c (patch)
tree95bbbcc7beaa974e7ab5849d8b2b91cb52593e46 /docs/firmware-design.rst
parentf478253da84ee14f36d0524d54719e7b0f88f4f1 (diff)
downloadtrusted-firmware-a-7c0a843fa2b6c047974676cd5175351b5db53c1c.tar.gz
Fix documentation for CnP bit
The CnP bit documentation in the Firmware Design Guide incorrectly used the term "Page Entries" instead of "Processing Elements". Fix that. Change-Id: Ie44ee99c281b7b1a9ad90fba2c7d109f12425507 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Diffstat (limited to 'docs/firmware-design.rst')
-rw-r--r--docs/firmware-design.rst6
1 files changed, 3 insertions, 3 deletions
diff --git a/docs/firmware-design.rst b/docs/firmware-design.rst
index 1f8fcc862b..c383c5d148 100644
--- a/docs/firmware-design.rst
+++ b/docs/firmware-design.rst
@@ -2574,9 +2574,9 @@ This Architecture Extension is targeted when ``ARM_ARCH_MAJOR`` == 8 and
``ARM_ARCH_MINOR`` >= 2.
- The Common not Private (CnP) bit is enabled to indicate that multiple
- Page Entries in the same Inner Shareable domain use the same translation
- table entries for a given stage of translation for a particular translation
- regime.
+ Processing Elements in the same Inner Shareable domain use the same
+ translation table entries for a given stage of translation for a particular
+ translation regime.
ARMv7
~~~~~