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authorYatharth Kochar <yatharth.kochar@arm.com>2016-06-28 16:58:26 +0100
committerYatharth Kochar <yatharth.kochar@arm.com>2016-09-21 16:27:15 +0100
commit1a0a3f0622e4b569513304109d9a0d093b71228a (patch)
tree9850566923168a92a6ec7ebbabe03119f14b2786 /common/aarch32
parenta8aa7fec1d4a6df8617c0d0463f1e10f1827a609 (diff)
downloadtrusted-firmware-a-1a0a3f0622e4b569513304109d9a0d093b71228a.tar.gz
AArch32: Common changes needed for BL1/BL2
This patch adds common changes to support AArch32 state in BL1 and BL2. Following are the changes: * Added functions for disabling MMU from Secure state. * Added AArch32 specific SMC function. * Added semihosting support. * Added reporting of unhandled exceptions. * Added uniprocessor stack support. * Added `el3_entrypoint_common` macro that can be shared by BL1 and BL32 (SP_MIN) BL stages. The `el3_entrypoint_common` is similar to the AArch64 counterpart with the main difference in the assembly instructions and the registers that are relevant to AArch32 execution state. * Enabled `LOAD_IMAGE_V2` flag in Makefile for `ARCH=aarch32` and added check to make sure that platform has not overridden to disable it. Change-Id: I33c6d8dfefb2e5d142fdfd06a0f4a7332962e1a3
Diffstat (limited to 'common/aarch32')
-rw-r--r--common/aarch32/debug.S12
1 files changed, 12 insertions, 0 deletions
diff --git a/common/aarch32/debug.S b/common/aarch32/debug.S
index 01ec1e384c..6be69512c5 100644
--- a/common/aarch32/debug.S
+++ b/common/aarch32/debug.S
@@ -32,6 +32,7 @@
#include <asm_macros.S>
.globl do_panic
+ .globl report_exception
/***********************************************************
* The common implementation of do_panic for all BL stages
@@ -40,3 +41,14 @@ func do_panic
b plat_panic_handler
endfunc do_panic
+ /***********************************************************
+ * This function is called from the vector table for
+ * unhandled exceptions. It reads the current mode and
+ * passes it to platform.
+ ***********************************************************/
+func report_exception
+ mrs r0, cpsr
+ and r0, #MODE32_MASK
+ bl plat_report_exception
+ bl plat_panic_handler
+endfunc report_exception