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authorJimmy Brisson <jimmy.brisson@arm.com>2020-08-04 16:18:52 -0500
committerlaurenw-arm <lauren.wehrmeister@arm.com>2020-10-12 10:55:03 -0500
commitd7b5f40823d449cc79e6440174390997cf11a9d9 (patch)
tree631affeb74091069edf06596f83fbe37864942c3 /bl32
parent7ad39818b184850d263008e7d36ba16adf72a669 (diff)
downloadtrusted-firmware-a-d7b5f40823d449cc79e6440174390997cf11a9d9.tar.gz
Increase type widths to satisfy width requirements
Usually, C has no problem up-converting types to larger bit sizes. MISRA rule 10.7 requires that you not do this, or be very explicit about this. This resolves the following required rule: bl1/aarch64/bl1_context_mgmt.c:81:[MISRA C-2012 Rule 10.7 (required)]<None> The width of the composite expression "0U | ((mode & 3U) << 2U) | 1U | 0x3c0U" (32 bits) is less that the right hand operand "18446744073709547519ULL" (64 bits). This also resolves MISRA defects such as: bl2/aarch64/bl2arch_setup.c:18:[MISRA C-2012 Rule 12.2 (required)] In the expression "3U << 20", shifting more than 7 bits, the number of bits in the essential type of the left expression, "3U", is not allowed. Further, MISRA requires that all shifts don't overflow. The definition of PAGE_SIZE was (1U << 12), and 1U is 8 bits. This caused about 50 issues. This fixes the violation by changing the definition to 1UL << 12. Since this uses 32bits, it should not create any issues for aarch32. This patch also contains a fix for a build failure in the sun50i_a64 platform. Specifically, these misra fixes removed a single and instruction, 92407e73 and x19, x19, #0xffffffff from the cm_setup_context function caused a relocation in psci_cpus_on_start to require a linker-generated stub. This increased the size of the .text section and caused an alignment later on to go over a page boundary and round up to the end of RAM before placing the .data section. This sectionn is of non-zero size and therefore causes a link error. The fix included in this reorders the functions during link time without changing their ording with respect to alignment. Change-Id: I76b4b662c3d262296728a8b9aab7a33b02087f16 Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>
Diffstat (limited to 'bl32')
-rw-r--r--bl32/tsp/aarch64/tsp_entrypoint.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/bl32/tsp/aarch64/tsp_entrypoint.S b/bl32/tsp/aarch64/tsp_entrypoint.S
index ebc5c2c3d4..a007bab302 100644
--- a/bl32/tsp/aarch64/tsp_entrypoint.S
+++ b/bl32/tsp/aarch64/tsp_entrypoint.S
@@ -60,7 +60,7 @@ func tsp_entrypoint _align=3
*/
pie_fixup:
ldr x0, =pie_fixup
- and x0, x0, #~(PAGE_SIZE - 1)
+ and x0, x0, #~(PAGE_SIZE_MASK)
mov_imm x1, (BL32_LIMIT - BL32_BASE)
add x1, x1, x0
bl fixup_gdt_reloc