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authorAchin Gupta <achin.gupta@arm.com>2014-05-09 12:00:17 +0100
committerAchin Gupta <achin.gupta@arm.com>2014-05-22 17:47:20 +0100
commitfa9c08b7d117cb736911288668f9fd987505b4e3 (patch)
treec935c5a3ab474265b51c2b1c8c53ec798e9fee2c /bl32/tsp/tsp.mk
parentdce74b891e0e6020d0a18384e32f280133631d9b (diff)
downloadtrusted-firmware-a-fa9c08b7d117cb736911288668f9fd987505b4e3.tar.gz
Use secure timer to generate S-EL1 interrupts
This patch adds support in the TSP to program the secure physical generic timer to generate a EL-1 interrupt every half second. It also adds support for maintaining the timer state across power management operations. The TSPD ensures that S-EL1 can access the timer by programming the SCR_EL3.ST bit. This patch does not actually enable the timer. This will be done in a subsequent patch once the complete framework for handling S-EL1 interrupts is in place. Change-Id: I1b3985cfb50262f60824be3a51c6314ce90571bc
Diffstat (limited to 'bl32/tsp/tsp.mk')
-rw-r--r--bl32/tsp/tsp.mk3
1 files changed, 2 insertions, 1 deletions
diff --git a/bl32/tsp/tsp.mk b/bl32/tsp/tsp.mk
index c478b435f8..07bd9c649c 100644
--- a/bl32/tsp/tsp.mk
+++ b/bl32/tsp/tsp.mk
@@ -32,7 +32,8 @@ BL32_SOURCES += bl32/tsp/tsp_main.c \
bl32/tsp/aarch64/tsp_entrypoint.S \
bl32/tsp/aarch64/tsp_request.S \
common/aarch64/early_exceptions.S \
- lib/locks/exclusive/spinlock.S
+ lib/locks/exclusive/spinlock.S \
+ bl32/tsp/tsp_timer.c
BL32_LINKERFILE := bl32/tsp/tsp.ld.S