path: root/bl32/tsp/tsp.mk
diff options
authorAchin Gupta <achin.gupta@arm.com>2014-05-09 12:17:56 +0100
committerAchin Gupta <achin.gupta@arm.com>2014-05-22 17:48:38 +0100
commit57356e9094ac5ecbca29131a3c53c6978457350f (patch)
treee594818efdfd359c091e4413ebc2ea1b480de9f3 /bl32/tsp/tsp.mk
parent6cf89021312a33395f804d80377a6ffdaadbbe21 (diff)
Add support for asynchronous FIQ handling in TSP
This patch adds support in the TSP to handle FIQ interrupts that are generated when execution is in the TSP. S-EL1 interrupt are handled normally and execution resumes at the instruction where the exception was originally taken. S-EL3 interrupts i.e. any interrupt not recognized by the TSP are handed to the TSPD. Execution resumes normally once such an interrupt has been handled at EL3. Change-Id: Ia3ada9a4fb15670afcc12538a6456f21efe58a8f
Diffstat (limited to 'bl32/tsp/tsp.mk')
1 files changed, 1 insertions, 0 deletions
diff --git a/bl32/tsp/tsp.mk b/bl32/tsp/tsp.mk
index 297556bb89..b9084d549e 100644
--- a/bl32/tsp/tsp.mk
+++ b/bl32/tsp/tsp.mk
@@ -30,6 +30,7 @@
BL32_SOURCES += bl32/tsp/tsp_main.c \
bl32/tsp/aarch64/tsp_entrypoint.S \
+ bl32/tsp/aarch64/tsp_exceptions.S \
bl32/tsp/aarch64/tsp_request.S \
bl32/tsp/tsp_interrupt.c \
bl32/tsp/tsp_timer.c \