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authorJeenu Viswambharan <jeenu.viswambharan@arm.com>2018-05-17 11:24:01 +0100
committerJeenu Viswambharan <jeenu.viswambharan@arm.com>2018-07-19 10:13:18 +0100
commitd5a23af50fb1ddb1f53a095c0a9d15c295d9bcc3 (patch)
treeca43bf5c4c8cacd70bc93fee77e9d9f098e8bdaf /bl31
parentb56dc2a98cab0ea618cce83b3702814b7fcafd7d (diff)
downloadtrusted-firmware-a-d5a23af50fb1ddb1f53a095c0a9d15c295d9bcc3.tar.gz
RAS: Introduce handler for Double Faults
Double fault is when the PE receives another error whilst one is being handled. To detect double fault condition, a per-CPU flag is introduced to track the status of error handling. The flag is checked/modified while temporarily masking external aborts on the PE. This patch routes double faults to a separate platform-defined handler. Change-Id: I70e9b7ba4c817273c55a0af978d9755ff32cc702 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Diffstat (limited to 'bl31')
-rw-r--r--bl31/aarch64/ea_delegate.S23
1 files changed, 20 insertions, 3 deletions
diff --git a/bl31/aarch64/ea_delegate.S b/bl31/aarch64/ea_delegate.S
index 9faa503ff3..9d7c5e8a9c 100644
--- a/bl31/aarch64/ea_delegate.S
+++ b/bl31/aarch64/ea_delegate.S
@@ -5,6 +5,7 @@
*/
+#include <assert_macros.S>
#include <asm_macros.S>
#include <assert_macros.S>
#include <context.h>
@@ -179,6 +180,15 @@ endfunc delegate_async_ea
* x1: EA syndrome
*/
func ea_proceed
+ /*
+ * If the ESR loaded earlier is not zero, we were processing an EA
+ * already, and this is a double fault.
+ */
+ ldr x5, [sp, #CTX_EL3STATE_OFFSET + CTX_ESR_EL3]
+ cbz x5, 1f
+ no_ret plat_handle_double_fault
+
+1:
/* Save EL3 state */
mrs x2, spsr_el3
mrs x3, elr_el3
@@ -216,7 +226,6 @@ func ea_proceed
mov x28, sp
#endif
bl plat_ea_handler
- mov x30, x29
#if ENABLE_ASSERTIONS
/*
@@ -232,7 +241,7 @@ func ea_proceed
/* Make SP point to context */
msr spsel, #1
- /* Restore EL3 state */
+ /* Restore EL3 state and ESR */
ldp x1, x2, [sp, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
msr spsr_el3, x1
msr elr_el3, x2
@@ -242,5 +251,13 @@ func ea_proceed
msr scr_el3, x3
msr esr_el3, x4
- ret
+#if ENABLE_ASSERTIONS
+ cmp x4, xzr
+ ASM_ASSERT(ne)
+#endif
+
+ /* Clear ESR storage */
+ str xzr, [sp, #CTX_EL3STATE_OFFSET + CTX_ESR_EL3]
+
+ ret x29
endfunc ea_proceed