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authorSandrine Bailleux <sandrine.bailleux@arm.com>2015-06-11 10:46:48 +0100
committerAchin Gupta <achin.gupta@arm.com>2015-08-13 20:05:31 +0100
commiteb975f52ea2e70216d214efcff3154f3cf081cb0 (patch)
treec7f84e060207959feefb4107631bd9d7e3ca44bf /bl31/bl31.mk
parent8ee2498039f7409ab6aa3ed4ef7f0bce05b61fa3 (diff)
downloadtrusted-firmware-a-eb975f52ea2e70216d214efcff3154f3cf081cb0.tar.gz
PSCI: Unify warm reset entry points
There used to be 2 warm reset entry points: - the "on finisher", for when the core has been turned on using a PSCI CPU_ON call; - the "suspend finisher", entered upon resumption from a previous PSCI CPU_SUSPEND call. The appropriate warm reset entry point used to be programmed into the mailboxes by the power management hooks. However, it is not required to provide this information to the PSCI entry point code, as it can figure it out by itself. By querying affinity info state, a core is able to determine on which execution path it is. If the state is ON_PENDING then it means it's been turned on else it is resuming from suspend. This patch unifies the 2 warm reset entry points into a single one: psci_entrypoint(). The patch also implements the necessary logic to distinguish between the 2 types of warm resets in the power up finisher. The plat_setup_psci_ops() API now takes the secure entry point as an additional parameter to enable the platforms to configure their mailbox. The platform hooks `pwr_domain_on` and `pwr_domain_suspend` no longer take secure entry point as a parameter. Change-Id: I7d1c93787b54213aefdbc046b8cd66a555dfbfd9
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