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authorVikram Kanigiri <vikram.kanigiri@arm.com>2014-05-15 18:27:15 +0100
committerVikram Kanigiri <vikram.kanigiri@arm.com>2014-05-22 15:43:23 +0100
commit29fb905d5f36a415a170a4bffeadf13b5f084345 (patch)
tree4cf20542c5219393010b1285dd88de5b0e2a519e /bl2
parent23ff9baa7e01eac3a451f2e8ed768c9b90d3567a (diff)
downloadtrusted-firmware-a-29fb905d5f36a415a170a4bffeadf13b5f084345.tar.gz
Rework handover interface between BL stages
This patch reworks the handover interface from: BL1 to BL2 and BL2 to BL3-1. It removes the raise_el(), change_el(), drop_el() and run_image() functions as they catered for code paths that were never exercised. BL1 calls bl1_run_bl2() to jump into BL2 instead of doing the same by calling run_image(). Similarly, BL2 issues the SMC to transfer execution to BL3-1 through BL1 directly. Only x0 and x1 are used to pass arguments to BL31. These arguments and parameters for running BL3-1 are passed through a reference to a 'el_change_info_t' structure. They were being passed value in general purpose registers earlier. Change-Id: Id4fd019a19a9595de063766d4a66295a2c9307e1
Diffstat (limited to 'bl2')
-rw-r--r--bl2/aarch64/bl2_entrypoint.S2
-rw-r--r--bl2/bl2_main.c61
2 files changed, 39 insertions, 24 deletions
diff --git a/bl2/aarch64/bl2_entrypoint.S b/bl2/aarch64/bl2_entrypoint.S
index 4f7565f41e..09eadff2e0 100644
--- a/bl2/aarch64/bl2_entrypoint.S
+++ b/bl2/aarch64/bl2_entrypoint.S
@@ -46,7 +46,6 @@ func bl2_entrypoint
*/
mov x20, x0
mov x21, x1
- mov x22, x2
/* ---------------------------------------------
* This is BL2 which is expected to be executed
@@ -110,7 +109,6 @@ func bl2_entrypoint
* ---------------------------------------------
*/
mov x0, x21
- mov x1, x22
bl bl2_early_platform_setup
bl bl2_plat_arch_setup
diff --git a/bl2/bl2_main.c b/bl2/bl2_main.c
index 4a54bf1d2d..6da5c8321d 100644
--- a/bl2/bl2_main.c
+++ b/bl2/bl2_main.c
@@ -39,6 +39,27 @@
#include "bl2_private.h"
/*******************************************************************************
+ * Runs BL31 from the given entry point. It jumps to a higher exception level
+ * through an SMC.
+ ******************************************************************************/
+static void __dead2 bl2_run_bl31(bl31_args_t *bl2_to_bl31_args,
+ unsigned long arg1,
+ unsigned long arg2)
+{
+ /* Set the args pointers for X0 and X1 to BL31 */
+ bl2_to_bl31_args->bl31_image_info.args.arg0 = arg1;
+ bl2_to_bl31_args->bl31_image_info.args.arg1 = arg2;
+
+ /* Flush the entire BL31 args buffer */
+ flush_dcache_range((unsigned long) bl2_to_bl31_args,
+ sizeof(*bl2_to_bl31_args));
+
+ smc(RUN_IMAGE, (unsigned long)&bl2_to_bl31_args->bl31_image_info,
+ 0, 0, 0, 0, 0, 0);
+}
+
+
+/*******************************************************************************
* The only thing to do in BL2 is to load further images and pass control to
* BL31. The memory occupied by BL2 will be reclaimed by BL3_x stages. BL2 runs
* entirely in S-EL1. Since arm standard c libraries are not PIC, printf et al
@@ -86,19 +107,9 @@ void bl2_main(void)
*/
bl2_to_bl31_args = bl2_get_bl31_args_ptr();
- /*
- * Load the BL32 image if there's one. It is upto to platform
- * to specify where BL32 should be loaded if it exists. It
- * could create space in the secure sram or point to a
- * completely different memory. A zero size indicates that the
- * platform does not want to load a BL32 image.
- */
- if (bl2_to_bl31_args->bl32_meminfo.total_size)
- bl32_base = load_image(&bl2_to_bl31_args->bl32_meminfo,
- BL32_IMAGE_NAME,
- bl2_to_bl31_args->bl32_meminfo.attr &
- LOAD_MASK,
- BL32_BASE);
+ bl2_to_bl31_args->bl31_image_info.entrypoint = bl31_base;
+ bl2_to_bl31_args->bl31_image_info.spsr =
+ SPSR_64(MODE_EL3, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
/*
* Create a new layout of memory for BL31 as seen by BL2. This
@@ -143,6 +154,20 @@ void bl2_main(void)
SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
bl2_to_bl31_args->bl33_image_info.security_state = NON_SECURE;
+ /*
+ * Load the BL32 image if there's one. It is upto to platform
+ * to specify where BL32 should be loaded if it exists. It
+ * could create space in the secure sram or point to a
+ * completely different memory. A zero size indicates that the
+ * platform does not want to load a BL32 image.
+ */
+ if (bl2_to_bl31_args->bl32_meminfo.total_size)
+ bl32_base = load_image(&bl2_to_bl31_args->bl32_meminfo,
+ BL32_IMAGE_NAME,
+ bl2_to_bl31_args->bl32_meminfo.attr &
+ LOAD_MASK,
+ BL32_BASE);
+
if (bl32_base) {
/* Fill BL32 image info */
bl2_to_bl31_args->bl32_image_info.entrypoint = bl32_base;
@@ -155,18 +180,10 @@ void bl2_main(void)
bl2_to_bl31_args->bl32_image_info.spsr = 0;
}
- /* Flush the entire BL31 args buffer */
- flush_dcache_range((unsigned long) bl2_to_bl31_args,
- sizeof(*bl2_to_bl31_args));
-
/*
* Run BL31 via an SMC to BL1. Information on how to pass control to
* the BL32 (if present) and BL33 software images will be passed to
* BL31 as an argument.
*/
- run_image(bl31_base,
- SPSR_64(MODE_EL3, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS),
- SECURE,
- (void *) bl2_to_bl31_args,
- NULL);
+ bl2_run_bl31(bl2_to_bl31_args, (unsigned long)bl2_to_bl31_args, 0);
}