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authorLionel Debieve <lionel.debieve@st.com>2018-03-05 15:21:59 +0100
committerLionel Debieve <lionel.debieve@st.com>2018-03-05 17:34:25 +0100
commita24dbdcc12990c085f55795b5c0c9d6746bb0433 (patch)
tree07fe559c1686b3a1667bf3dbf5a143686d7a1f54 /bl2/aarch32/bl2_el3_entrypoint.S
parentf918bca3b7cbbb67e4e165c17591dd627804a777 (diff)
downloadtrusted-firmware-a-a24dbdcc12990c085f55795b5c0c9d6746bb0433.tar.gz
bl2-el3: Fix bl32 lr_svc used for bl33 entry address
When using BL2_EL3, we need to ensure that lr_svc is properly given to bl32 as it was previously made by bl1. Fixes ARM-Software/tf-issues#562 Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Diffstat (limited to 'bl2/aarch32/bl2_el3_entrypoint.S')
-rw-r--r--bl2/aarch32/bl2_el3_entrypoint.S5
1 files changed, 5 insertions, 0 deletions
diff --git a/bl2/aarch32/bl2_el3_entrypoint.S b/bl2/aarch32/bl2_el3_entrypoint.S
index 997b069cdf..0c7b064555 100644
--- a/bl2/aarch32/bl2_el3_entrypoint.S
+++ b/bl2/aarch32/bl2_el3_entrypoint.S
@@ -78,6 +78,11 @@ func bl2_run_next_image
ldr r1, [r8, #(ENTRY_POINT_INFO_PC_OFFSET + 4)]
msr spsr, r1
+ /* Some BL32 stages expect lr_svc to provide the BL33 entry address */
+ cps #MODE32_svc
+ ldr lr, [r8, #ENTRY_POINT_INFO_LR_SVC_OFFSET]
+ cps #MODE32_mon
+
add r8, r8, #ENTRY_POINT_INFO_ARGS_OFFSET
ldm r8, {r0, r1, r2, r3}
eret